STAC9766 IDT [Integrated Device Technology], STAC9766 Datasheet - Page 73

• Manufacturer Part Number: STAC9766
• Manufacturer: IDT [Integrated Device Technology]

IDT™
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH STEREO MICROPHONE AND MIC/JACK SENSING
STAC9766/9767
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH STEREO MICROPHONE AND MIC/JACK SENSING
Bit(s) Reset Value
9-5
3-1
4
0
Reg 66h Function Code
All other Function Codes
NA
1
0
01h Headphone Out
00h Line Out
05h Mic1
06h Mic2
RESERVED Bit not used, should read back 0
DL4:DL0
Name
FIP
IV
For RESET#: Reg 68h default value is 0000h.
Buffer delays: CODEC will provide a delay measurement for the input and output
channels. Software will use this value to accurately calculate audio stream
position with respect to what is been reproduced or recorded. These values are
in 20.83 microsecond (1/48000 second) units.
For output channels, this timing is from the end of AC Link frame in which the
sample is provided, until the time the analog signal appears at the output pin. For
input streams, this is from when the analog signal is presented at the pin until the
representative sample is provided on the AC Link.
Analog in and out paths are not considered as part of this delay.
The measurement is a 'typical' measurement, at a 48 KHz sample rate, with
minimal in-CODEC processing (i.e., 3D effects are turned off.)
These bits are read/write and are not reset on RESET#.
The default value is the delay internal to the CODEC. The BIOS may add to this
value the known delays external to the CODEC, such as for an external
amplifier.
Information Valid Bit: Indicates whether a sensing method is provided by the
CODEC and if information field is valid. This field is updated by the CODEC.
BIOS should NOT write this bit, as it is reset on RESET#.
Function Information Present
This bit is set to a 1 indicates that the G[4:0], INV, DL[4:0](Register 68h, Page
01h) and ST[2:0](register 6Ah, Page 01h) are supported and R/W capable.
This bit is Read Only.
00h - Information not provided
01h…1Eh - Buffer delay in 20.83 s units
1Fh - reserved
0h--After CODEC RESET# de-assertion, it indicates the CODEC does NOT
provides sensing logic and this bit will be Read Only. After a sense cycle is
completed indicates that no information is provided on the sensing method.
1h--After CODEC RESET# de-assertion, it indicates the CODEC provides
sensing logic for this I/O and this bit is Read/Write. After clearing this bit by
writing 1, when a sense cycle is completed the assertion of this bit indicates
that there is valid information in the remaining descriptor bits. Writing “0” to
this bit has no effect.
Table 24. Reg 68h Default Values
73
Description
Reg 68h Default Value
STAC9766/9767
0010h
0010h
0010h
0010h
0000h
PC AUDIO
V 7.4 12/06