STAC9766 IDT [Integrated Device Technology], STAC9766 Datasheet - Page 60

• Manufacturer Part Number: STAC9766
• Manufacturer: IDT [Integrated Device Technology]

IDT™
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH STEREO MICROPHONE AND MIC/JACK SENSING
STAC9766/9767
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH STEREO MICROPHONE AND MIC/JACK SENSING
8.1.20.
VCFG
D15
D7
ports the optional “AC’97 2.3 compliant AC-link slot to audio DAC mappings”.The default condition
assumes that 0, 0 are loaded in the DSA0 and DSA1 bits of the Extended Audio ID (Index 28h). With
0s in the DSA1 and DSA0 bits, the CODEC slot assignments are as per the AC’97 specification rec-
ommendations. If the DSA1 and DSA0 bits do not contain 0s, the slot assignments are as per the
table in the section describing the Extended Audio ID (Index 28h). The VRA bit, D0, will return a 1
indicating that the CODEC supports the optional variable sample rate conversion as defined by the
AC’97 specification.
1. External CID pin status (from analog) these bits are the logical inversion of the pin polarity (pin
2. If pin 48 is held high at powerup, this bit will be held to zero, to indicate the SPDIF is not avail-
Extended Audio Control/Status (2Ah)
Default: 0400h* (*default depends on CODEC ID)
15:14
13:12
11:10
RESERVED
Bit
9:6
5:4
3
2
1
0
45-46). These bits are zero if XTAL_OUT is grounded with an alternate external clock source in
primary mode only. Secondary mode can either be through BIT CLK driven or 24MHz clock
driver, with XTAL_OUT floating.
able.
1 K
RESERVED
Pin 48: To Enable SPDIF, use a 1K - 1 0 K
- 1 0 K external pullup. Do NOT leave Pin 48 floating.
DSA [1,0]
REV[1:0]
ID [1,0]
SPDIF
D14
RSVD
RSVD
RSVD
Name
D6
VRA
Read/Write
SPSA1
Read only
Read only
Read only
Read only
Read only
Read only
Read only
Read only
Access
D13
D5
Table 20. Extended Audio ID Register Functions
RESERVED
Reset Value
SPSA0
Variable
D12
60
D4
00
10
00
0
0
1
0
1
RSRVD
00 = XTAL_OUT grounded (Note 1)
CID1#,CID0# = XTAL_OUT crystal or floating
Bits not used, should read back 00
Indicates CODEC is AC’97 Rev 2.3 compliant
Reserved
DAC slot assignment
If CID[1:0] = 00 then DSA[1:0] resets to 00
If CID[1:0] = 01 then DSA[1:0] resets to 01
If CID[1:0] = 10 then DSA[1:0] resets to 01
If CID[1:0] = 11 then DSA[1:0] resets to 10
00 = left slot 3, right slot 4
01 = left slot 7, right slot 8
10 = left slot 6, right slot 9
11 = left slot 10, right slot 11
Reserved
0 = SPDIF pulled high on reset, SPDIF disabled
1 = default, SPDIF enabled (Note 2)
Reserved
Variable sample rates supported (Always = 1)
D11
D3
external pulldown. To Disable SPDIF, use a
STAC9766/9767
SPDIF
SPCV
D10
D2
Function
RSRVD
D9
D1
RESERVED
PC AUDIO
VRA enable
V 7.4 12/06
D8
D0