STAC9766 IDT [Integrated Device Technology], STAC9766 Datasheet - Page 13

• Manufacturer Part Number: STAC9766
• Manufacturer: IDT [Integrated Device Technology]

IDT™
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH STEREO MICROPHONE AND MIC/JACK SENSING
STAC9766/9767
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH STEREO MICROPHONE AND MIC/JACK SENSING
2.2.
AC Timing Characteristics
2.2.1.
2.2.2.
RESET# active low pulse width
RESET# inactive to SDATA_IN or BIT_CLK active delay
RESET# inactive to BIT_CLK startup delay
BIT_CLK active to RESET# asserted (Not shown in diagram)
SYNC active high pulse width
SYNC inactive to BIT_CLK startup delay
S D A T A _ I N
BIT_CLK
B I T _ C L K
R E S E T #
(T
load for BIT_CLK and 60pF external load for SDATA_IN)
Cold Reset
Warm Reset
SYNC
Note: BIT_CLK and SDATA_IN are in a high impedance state during reset.
ambient =
25 °C, AVdd = 3.3 V or 5 V ± 5%, DVdd = 3.3V ± 5%, AVss = DVss = 0 V; 7 5 pF external
Parameter
Parameter
Figure 3. Warm Reset Timing
Figure 2. Cold Reset Timing
Tsync_high
Tres_low
13
Tsync_high
Tsync2clk
Symbol
Tsync_2clk
Ttri2actv
Ttri2actv
Trst2clk
Tres_low
Symbol
Tri2actv
Trst2clk
Tclk2rst
STAC9766/9767
162.8
Min
1.0
0.01628
0.416
Min
1.0
-
Typ
1.3
-
Typ Max
-
-
-
-
Max
-
-
400
PC AUDIO
25
-
-
V 7.4 12/06
Units
Units
ns
ns
s
s
s
s