STAC9766 IDT [Integrated Device Technology], STAC9766 Datasheet - Page 14

• Manufacturer Part Number: STAC9766
• Manufacturer: IDT [Integrated Device Technology]

IDT™
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH STEREO MICROPHONE AND MIC/JACK SENSING
STAC9766/9767
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH STEREO MICROPHONE AND MIC/JACK SENSING
2.2.3.
2.2.4.
BIT_CLK frequency
BIT_CLK period
BIT_CLK output jitter
BLT_CLK high pulse width (Note 1)
BIT_CLK low pulse width (Note 1)
SYNC frequency
SYNC period
SYNC high pulse width
SYNC low pulse width
Note:
B I T _ C L K
S Y N C
Clocks
STAC9766/9767 Crystal Elimination Circuit and Clock Frequencies
The STAC9766/9767 supports several clock frequency inputs as described in the following table. In
general, when a 24.576 MHz xtal is not used, the XTALOUT pin should be tied to ground. This short
to ground configures the part into an alternate clock mode and enables an on board PLL.
CODEC Modes:
1.
short to ground
short to ground
short to ground
short to ground
S = The STAC9766/9767 as a Secondary CODEC.
P = The STAC9766/9767 as a Primary CODEC
XTAL or open
XTAL or open
XTAL or open
Pin Config
XTL_OUT
Worst case duty cycle restricted to 45/55.
XTAL
Parameter
T s y n c _ h i g h
Pin Config
Tclk_high
pulldown
pulldown
pulldown
pulldown
CID1
float
float
float
float
Figure 4. Clocks Timing
Table 1. Clock Mode Configuration
Pin Config
Tclk_period
pulldown
pulldown
pulldown
pulldown
14
CID0
float
float
float
float
T s y n c _ p e r i o d
Tsync_period
Tclk_period
Tsync_high
Tsync_low
Tclk_high
Tclk_low
Symbol
Tclk_low
12.288 MHz BIT_CLK
12.288 MHz BIT_CLK
12.288 MHz BIT_CLK
14.31818 MHz source
Clock Source Input
24.576MHz crystal
24.576 MHz source
27 MHz source
48 MHz source
T s y n c _ l o w
STAC9766/9767
Min
36
36
-
-
-
-
-
-
-
12.288
81.4
40.7
40.7
48.0
20.8
19.5
Typ
750
1.3
CODEC
Mode
P
S
S
S
P
P
P
P
Max
45
45
-
-
-
-
-
-
-
PC AUDIO
CODEC
V 7.4 12/06
Units
MHz
KHz
D
ns
ps
ns
ns
0
1
2
3
0
0
0
0
s
s
s