S71WS256NC0BAWE32 SPANSION [SPANSION], S71WS256NC0BAWE32 Datasheet - Page 153
S71WS256NC0BAWE32
Manufacturer Part Number
S71WS256NC0BAWE32
Description
Stacked Multi-Chip Product (MCP)
Manufacturer
SPANSION [SPANSION]
Datasheet
1.S71WS256NC0BAWE32.pdf
(188 pages)
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38.2 MRS Pin Control Type Mode Register Setting Timing
September 15, 2005 S71WS-N_01_A4
UB#, LB#
Note:
address bits(A7:A6:A5) have 4 sets of reserved bits like 0:0:0, 0:0:1, 1:0:1 and 1:1:0. If the reserved address bits are input,
then the mode will be set to the default mode. Each field has its own default mode, but this default mode is not 100% guar-
anteed, so the MRS setting sequence is highly recommended after power up. A12 is a reserved bit for future use. A12 must
be set as “0”. Not all the mode settings are tested. Per the mode settings to be tested, please contact Spansion. The 256
word Full page burst mode needs to meet t
In this device, the MRS pin is used for two purposes. One is to get into the mode register setting
and the other is to execute Partial Array Refresh mode.
To get into the Mode Register Setting, the system must drive the MRS# pin to V
(within 0.5µs) issue a write command (drive CS#, ADV#, UB#, LB# and WE# to V
OE# to V
issued within 0.5µs, then the device may get into the PAR mode.
Note:
A4
ADV#
Address
CS#
WE#
MRS#
CLK
1
1
MRS
(MRS SETTING TIMING)
1. Clock input is ignored.
Default mode. The address bits other than those listed in the table above are reserved. For example, Burst Length
V
A3
0
1
CC
MRS# Enable to Register Write Start
End of Write to MRS# Disable
=1.7
Partial Array Refresh
IH
A d v a n c e
during valid address). If the subsequent write command (WE# signal input) is not
–
PAR Disable (note 1)
2.0V, T
0
PAR Enable
Figure 38.1 Mode Register Setting Timing (OE# = V
A
PAR
=-40 to 85°C, Maximum Main Clock Frequency=66MHz
1
Parameter List
2
I n f o r m a t i o n
S71WS-Nx0 Based MCPs
Table 38.3 MRS AC Characteristics
3
t
t
MW
BC
AS
A2
(Burst Cycle time) parameter as max. 2500ns.
0
1
4
5
Bottom Array (note 1)
Register Write Start
PAR Array
t
t
CW
AW
Top Array
6
t
WC
t
PARA
t
WP
BW
7
8
Symbol
9
t
t
MW
A1
WU
0
0
1
1
t
WU
10
Register Write Complete
A0
0
1
0
1
IH
11
Min
)
0
0
Register Update Complete
PAR Size
IL
Speed
Full Array (note 1)
and immediately
12
1/2 Array
1/4 Array
3/4 Array
Max
500
—
PARS
IL
13
and drive
Units
ns
ns
151
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