S71GS128NB0 SPANSION [SPANSION], S71GS128NB0 Datasheet - Page 185
S71GS128NB0
Manufacturer Part Number
S71GS128NB0
Description
128N based MCPs
Manufacturer
SPANSION [SPANSION]
Datasheet
1.S71GS128NB0.pdf
(195 pages)
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Notes:
1. High-Z to Low-Z timings are tested with the circuit shown in
2. Low-Z to High-Z timings are tested with the circuit shown in
December 15, 2004 cellRAM_02_A0
100mV transition away from the High-Z (V
a 100mV transition from either V
Parameter
Address Access Time
Page Access Time
LB#/UB# Access Time
LB#/UB# Disable to High-Z Output
LB#/UB# Enable to Low-Z Output
Chip Select Access Time
Chip Disable to High-Z Output
Chip Enable to Low-Z Output
Output Enable to Valid Output
Output Hold from Address Change
Output Disable to High-Z Output
Output Enable to Low-Z Output
Page Cycle Time
READ Cycle Time
A d v a n c e
Table 75. READ Cycle Timing Requirements
OH
or V
OL
I n f o r m a t i o n
CCQ
toward V
/2) level toward either V
CellularRAM-2A
CCQ
/2.
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
OHZ
t
BHZ
OLZ
APA
BLZ
CO
HZ
OE
OH
AA
BA
LZ
PC
RC
Figure 71
Figure 71
Min
10
10
20
70
0
0
5
0
5
on
OH
on
page
or V
page
Max
70
20
70
70
20
8
8
8
OL
184. The Low-Z timings measure a
184. The High-Z timings measure
.
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
2
1
2
1
2
1
185
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