ZL50400GDC ZARLINK [Zarlink Semiconductor Inc], ZL50400GDC Datasheet - Page 102

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ZL50400GDC

Manufacturer Part Number
ZL50400GDC
Description
Lightly Managed/Unmanaged 9-Port 10/100 M Ethernet Switch
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
See Programming Timeout Reset application note, ZLAN-41, for more information.
12.3.10.5
CPU Address E80-E83
Accessed by CPU (RO)
12.3.10.6
CPU Address E90+n
Accessed by CPU (RO)
Bits [15:0]:
Bits [23:16]:
Bits [31:24]:
Bit [0]:
Bit [1]:
Bit [2]:
Bit [3]:
Bit [4]:
Bit [5]:
Bit [6]
Bit [7]:
BOOTSTRAP0 – BOOTSTRAP3
PRTFSMST0~9
TX FSM NOT idle for 5 sec
TX FIFO control NOT idle for 5 sec
RX SFD detection NOT idle for 5 sec
RXINF NOT idle for 5 sec
PTCTL NOT idle for 5 sec
Reserved
LHB frame detected
LHB receiving timeout
Bootstrap value from M[7:0]_TXEN
Bootstrap value from TSTOUT[15:0]:
Reserved
31
Bit [6:0]: TSTOUT[6:0]
Bit [8:7]: Invert of TSTOUT[8:7]
Bit [9]: TSTOUT[11]
Bit [10]: TSTOUT[9]
Bit [11]: TSTOUT[10]
Bit [14:12]: TSTOUT[14:12]
Bit [15]: Always 0
Bit [16]: M0_TXEN
Bit [17]: M1_TXEN
...
Bit [23]: M7_TXEN
BT3
23
Zarlink Semiconductor Inc.
BT2
ZL50400
102
15
BT1
BT0
0
Data Sheet

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