MC9S08GB32 Motorola, MC9S08GB32 Datasheet - Page 41
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MC9S08GB32
Manufacturer Part Number
MC9S08GB32
Description
Microcontrollers
Manufacturer
Motorola
Datasheet
1.MC9S08GB32.pdf
(290 pages)
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4.2
The registers in the MC9S08GB/GT are divided into these three groups:
Direct-page registers can be accessed with efficient direct addressing mode instructions. Bit manipulation
instructions can be used to access any bit in any direct-page register.
user-accessible direct-page registers and control bits.
The direct page registers in
requires the lower byte of the address. Because of this, the lower byte of the address in column one is
shown in bold text. In
Table
from the bit names to the right. Cells that are not associated with named bits are shaded. A shaded cell with
a 0 indicates this unused bit always reads as a 0. Shaded cells with dashes indicate unused or reserved bit
locations that could read as 1s or 0s.
Freescale Semiconductor
•
•
•
4-2,
Direct-page registers are located in the first 128 locations in the memory map, so they are
accessible with efficient direct addressing mode instructions.
High-page registers are used much less often, so they are located above $1800 in the memory map.
This leaves more room in the direct page for more frequently used registers and variables.
The nonvolatile register area consists of a block of 16 locations in FLASH memory at
$FFB0–$FFBF.
Nonvolatile register locations include:
— Three values which are loaded into working registers at reset
— An 8-byte backdoor comparison key which optionally allows a user to gain controlled access
Because the nonvolatile register locations are FLASH memory, they must be erased and
programmed like other FLASH memory locations.
Register Addresses and Bit Assignments
Table
to secure memory
4-3, and
Table 4-3
Table
Table 4-2
4-4, the register names in column two are shown in bold to set them apart
and
Table 4-4
MC9S08GB/GT Data Sheet, Rev. 2.3
can use the more efficient direct addressing mode which only
the whole address in column one is shown in bold. In
Table 4-2
Register Addresses and Bit Assignments
is a summary of all
41
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