MC9S08GB32 Motorola, MC9S08GB32 Datasheet - Page 134

• Manufacturer Part Number: MC9S08GB32
• Description: Microcontrollers
• Manufacturer: Motorola

Central Processor Unit (CPU)
8.5.5
The BGND instruction is new to the HCS08 compared to the M68HC08. BGND would not be used in
normal user programs because it forces the CPU to stop processing user instructions and enter the active
background mode. The only way to resume execution of the user program is through reset or by a host
debug system issuing a GO, TRACE1, or TAGGO serial command through the background debug
interface.
Software-based breakpoints can be set by replacing an opcode at the desired breakpoint address with the
BGND opcode. When the program reaches this breakpoint address, the CPU is forced to active background
mode rather than continuing the user program.
8.6
Instruction Set Summary Nomenclature
The nomenclature listed here is used in the instruction descriptions in
Operators
CPU registers
Memory and addressing
M:M + $0001=
134
CCR
PCH
PCL
PC
SP
←
( )
M
⊕
H
&
A
X
HCS08 Instruction Set Summary
+
–
×
÷
|
:
BGND Instruction
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
=
Contents of register or memory location shown inside parentheses
Is loaded with (read: “gets”)
Boolean AND
Boolean OR
Boolean exclusive-OR
Multiply
Divide
Concatenate
Add
Negate (two’s complement)
Accumulator
Condition code register
Index register, higher order (most significant) 8 bits
Index register, lower order (least significant) 8 bits
Program counter
Program counter, higher order (most significant) 8 bits
Program counter, lower order (least significant) 8 bits
Stack pointer
A memory location or absolute data, depending on addressing mode
A 16-bit value in two consecutive memory locations. The higher-order (most
significant) 8 bits are located at the address of M, and the lower-order (least
significant) 8 bits are located at the next higher sequential address.
MC9S08GB/GT Data Sheet, Rev. 2.3
Table
8-1.
Freescale Semiconductor