MC9S08GB32 Motorola, MC9S08GB32 Datasheet - Page 218

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MC9S08GB32

Manufacturer Part Number
MC9S08GB32
Description
Microcontrollers
Manufacturer
Motorola
Datasheet

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Inter-Integrated Circuit (IIC) Module
218
Note that the TX bit in IIC1C must correctly reflect the desired direction of transfer in master and slave
modes for the transmission to begin. For instance, if the IIC is configured for master transmit but a
master receive is desired, then reading the IIC1D will not initiate the receive.
Reading the IIC1D will return the last byte received while the IIC is configured in either master receive
or slave receive modes. The IIC1D does not reflect every byte that is transmitted on the IIC bus, nor
can software verify that a byte has been written to the IIC1D correctly by reading it back.
In master transmit mode, the first byte of data written to IIC1D following assertion of MST is used for
the address transfer and should comprise of the calling address (in bit 7–bit 1) concatenated with the
required R/W bit (in position bit 0).
MC9S08GB/GT Data Sheet, Rev. 2.3
Freescale Semiconductor

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