MC9S08GB32 Motorola, MC9S08GB32 Datasheet - Page 105
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MC9S08GB32
Manufacturer Part Number
MC9S08GB32
Description
Microcontrollers
Manufacturer
Motorola
Datasheet
1.MC9S08GB32.pdf
(290 pages)
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7.3.3
FLL engaged internal (FEI) is entered when any of the following conditions occur:
In FLL engaged internal mode, the reference clock is derived from the internal reference clock
ICGIRCLK, and the FLL loop will attempt to lock the ICGDCLK frequency to the desired value, as
selected by the MFD bits.
7.3.3.1
FEI unlocked is a temporary state that is entered when FEI is entered and the count error (∆n) output from
the subtractor is greater than the maximum n
lock detector to detect the unlock condition.
Freescale Semiconductor
•
•
CLKS bits are written to 01
The DCO clock stabilizes (DCOS = 1) while in SCM upon exiting the off state with CLKS = 01
FLL Engaged, Internal Clock (FEI) Mode
FLL Engaged Internal Unlocked
DCOS
COUNTER ENABLE
SUBTRACTOR
CLKST
REFERENCE
DIVIDER (/7)
RANGE
LOCK
MFD
RANGE
Figure 7-6. Detailed Frequency-Locked Loop Block Diagram
OVERFLOW
LOSS OF CLOCK
LOLS
DETECTOR
LOCK AND
LOCS
MC9S08GB/GT Data Sheet, Rev. 2.3
ICGIRCLK
ERCS
DIGITAL
FILTER
CLKST
LOOP
FLT
unlock
COUNTER
PULSE
or less than the minimum n
CONTROLLED
ICGIF
OSCILLATOR
FLL ANALOG
DIGITALLY
INTERRUPT
RESET AND
CIRCUIT
SELECT
CLOCK
CONTROL
CLKS
LOLRE LOCRE
ICGDCLK
ICG2DCLK
1x
2x
FREQUENCY
DIVIDER (R)
REDUCED
unlock
RFD
, as required by the
FREQUENCY-
LOOP (FLL)
LOCKED
Functional Description
ICGOUT
RESET
IRQ
105
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