MC9S08GB32 Motorola, MC9S08GB32 Datasheet - Page 127

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MC9S08GB32

Manufacturer Part Number
MC9S08GB32
Description
Microcontrollers
Manufacturer
Motorola
Datasheet

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8.3.1
The A accumulator is a general-purpose 8-bit register. One operand input to the arithmetic logic unit
(ALU) is connected to the accumulator and the ALU results are often stored into the A accumulator after
arithmetic and logical operations. The accumulator can be loaded from memory using various addressing
modes to specify the address where the loaded data comes from, or the contents of A can be stored to
memory using various addressing modes to specify the address where data from A will be stored.
Reset has no effect on the contents of the A accumulator.
8.3.2
This 16-bit register is actually two separate 8-bit registers (H and X), which often work together as a 16-bit
address pointer where H holds the upper byte of an address and X holds the lower byte of the address. All
indexed addressing mode instructions use the full 16-bit value in H:X as an index reference pointer;
however, for compatibility with the earlier M68HC05 Family, some instructions operate only on the
low-order 8-bit half (X).
Many instructions treat X as a second general-purpose 8-bit register that can be used to hold 8-bit data
values. X can be cleared, incremented, decremented, complemented, negated, shifted, or rotated. Transfer
instructions allow data to be transferred from A or transferred to A where arithmetic and logical operations
can then be performed.
For compatibility with the earlier M68HC05 Family, H is forced to $00 during reset. Reset has no effect
on the contents of X.
Freescale Semiconductor
Accumulator (A)
Index Register (H:X)
H
CONDITION CODE REGISTER
15
15
INDEX REGISTER (HIGH)
16-BIT INDEX REGISTER H:X
PROGRAM COUNTER
MC9S08GB/GT Data Sheet, Rev. 2.3
STACK POINTER
Figure 8-1. CPU Registers
8
7
7
V 1 1 H I N Z
7
INDEX REGISTER (LOW)
ACCUMULATOR
C
0
0
0
0
CARRY
ZERO
NEGATIVE
INTERRUPT MASK
HALF-CARRY (FROM BIT 3)
TWO’S COMPLEMENT OVERFLOW
SP
PC
CCR
A
X
Programmer’s Model and CPU Registers
127

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