MC9S08GB32 Motorola, MC9S08GB32 Datasheet - Page 232
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MC9S08GB32
Manufacturer Part Number
MC9S08GB32
Description
Microcontrollers
Manufacturer
Motorola
Datasheet
1.MC9S08GB32.pdf
(290 pages)
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Analog-to-Digital Converter (ATD) Module
14.6.2
Writes to the ATD status and control register clears the CCF flag, cancels any pending interrupts, and
initiates a new conversion.
232
1
2
3
Maximum ATD conversion clock frequency is 2 MHz. The max bus clock frequency is computed from the max ATD conversion
clock frequency times the indicated prescaler setting; i.e., for a PRS of 0, max bus clock = 2 (max ATD conversion clock
frequency) × 2 (Factor) = 4 MHz.
Use these settings if the maximum desired ATD conversion clock frequency is 1 MHz. The max bus clock frequency is
computed from the max ATD conversion clock frequency times the indicated prescaler setting; i.e., for a PRS of 0, max bus
clock = 1 (max ATD conversion clock frequency) × 2 (Factor) = 2 MHz.
Minimum ATD conversion clock frequency is 500 kHz. The min bus clock frequency is computed from the min ATD conversion
clock frequency times the indicated prescaler setting; i.e., for a PRS of 1, min bus clock = 0.5 (min ATD conversion clock
frequency) × 2 (Factor) = 1 MHz.
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
PRS
ATD Status and Control (ATD1SC)
Factor = (PRS +1) × 2
Reset:
Read:
Write:
10
12
14
16
18
20
22
24
26
28
30
32
Figure 14-8. ATD Status and Control Register (ATD1SC)
2
4
6
8
Bit 7
CCF
0
= Unimplemented or Reserved
Table 14-4. Clock Prescaler Values
MC9S08GB/GT Data Sheet, Rev. 2.3
ATDIE
(2 MHz max ATD Clock)
6
0
Max Bus Clock
ATDCO
MHz
12
16
20
20
20
20
20
20
20
20
20
20
20
20
4
8
5
0
4
0
1
(1 MHz max ATD Clock)
Max Bus Clock
3
0
MHz
10
12
14
16
18
20
20
20
20
20
20
20
2
4
6
8
ATDCH
2
0
2
(500 kHz min ATD Clock)
Freescale Semiconductor
1
0
Min Bus Clock
MHz
Bit 0
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
1
3
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