CS8427 Cirrus Logic, CS8427 Datasheet - Page 3

• Manufacturer Part Number: CS8427
• Description: 96 kHz Digital Audio Interface Transceiver
• Manufacturer: Cirrus Logic

DS477PP3
12. CONTROL PORT REGISTER BIT DEFINITIONS ............................................................... 29
13. PIN DESCRIPTION - SOFTWARE MODE ........................................................................... 40
14. HARDWARE MODE DESCRIPTION ................................................................................... 42
15. PIN DESCRIPTION - HARDWARE MODE .......................................................................... 44
16. APPLICATIONS ................................................................................................................... 46
17. PACKAGE DIMENSIONS .................................................................................................... 48
18. APPENDIX A: EXTERNAL AES3/SPDIF/IEC60958
19. APPENDIX B: CHANNEL STATUS AND USER DATA BUFFER MANAGEMENT ........... 52
12.1 Control 1 (1h).................................................................................................................. 29
12.2 Control 2 (2h).................................................................................................................. 29
12.3 Data Flow Control (3h) ................................................................................................... 30
12.4 Clock Source Control (4h) .............................................................................................. 31
12.5 Serial Audio Input Port Data Format (5h) ....................................................................... 31
12.6 Serial Audio Output Port Data Format (6h) .................................................................... 32
12.7 Interrupt 1 Status (7h) (Read Only) ................................................................................ 33
12.8 Interrupt 2 Status (8h) (Read Only) ................................................................................ 34
12.9 Interrupt 1 Mask (9h) ...................................................................................................... 34
12.10 Interrupt 1 Mode MSB (Ah) & Interrupt 1 Mode LSB (Bh) ............................................ 34
12.11 Interrupt 2 Mask (Ch).................................................................................................... 35
12.12 Interrupt 2 Mode MSB (Dh) & Interrupt 2 Mode LSB (Eh) ............................................ 35
12.13 Receiver Channel Status (Fh) (Read Only) .................................................................. 35
12.14 Receiver Error (10h) (Read Only)................................................................................. 36
12.15 Receiver Error Mask (11h) ........................................................................................... 37
12.16 Channel Status Data Buffer Control (12h) .................................................................... 37
12.17 User Data Buffer Control (13h) ..................................................................................... 38
12.18 Q-Channel Subcode Bytes 0 to 9 (14h - 1Dh) (Read Only) ......................................... 38
12.19 OMCK/RMCK Ratio (1Eh) (Read Only)........................................................................ 39
12.20 C-bit or U-bit Data Buffer (20h - 37h) ........................................................................... 39
12.21 CS8427 I.D. and Version Register (7Fh) (Read Only) ................................................. 39
14.1 Serial Audio Port Formats ............................................................................................. 42
16.1 Reset, Power Down and Start-up .................................................................................. 46
16.2 ID Code and Revision Code .......................................................................................... 46
16.3 Power Supply, Grounding, and PCB layout ................................................................... 46
16.4 Synchronization of Multiple CS8427s ............................................................................ 47
18.1 AES3 Transmitter External Components ....................................................................... 50
18.2 AES3 Receiver External Components ........................................................................... 51
18.3 Isolating Transformer Requirements ............................................................................. 51
19.1 AES3 Channel Status(C) Bit Management .................................................................... 52
19.2 AES3 User (U) Bit Management .................................................................................... 54
TRANSMITTER AND RECEIVER COMPONENTS ............................................................. 50
19.1.1 Manually accessing the E buffer ....................................................................... 52
19.1.2 Reserving the first 5 bytes in the E buffer ......................................................... 53
19.1.3 Serial Copy Management System (SCMS) ....................................................... 53
19.1.4 Channel Status Data E Buffer Access .............................................................. 54
19.2.1 Mode 1: Transmit All Zeros ............................................................................... 54
19.2.2 Mode 2: Block Mode ......................................................................................... 54
CS8427
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