MMC2114 MOTOROLA [Motorola, Inc], MMC2114 Datasheet - Page 147

• Manufacturer Part Number: MMC2114
• Description: M CORE Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

5.7 Functional Description
5.7.1 Reset Sources
MMC2114 • MMC2113 • MMC2112 — Rev. 1.0
MOTOROLA
Table 5-3
controller.
To protect data integrity, a synchronous reset source is not acted upon
by the reset control logic until the end of the current bus cycle. Reset is
then asserted on the next rising edge of the system clock after the cycle
is terminated. Whenever the reset control logic must synchronize reset
to the end of the bus cycle, the internal bus monitor is automatically
enabled regardless of the BME bit state in the chip configuration module
CCR register. Then, if the current bus cycle is not terminated normally
the bus monitor terminates the cycle based on the length of time
programmed in the BMT field of the CCR register.
Internal single-byte, half-word, or word writes are guaranteed to
complete without data corruption when a synchronous reset occurs.
External writes, including word writes to 16-bit ports, are also
guaranteed to complete.
Asynchronous reset sources usually indicate a catastrophic failure.
Therefore, the reset control logic does not wait for the current bus cycle
to complete. Reset is asserted immediately to the system.
Power on
External RESET pin (not stop mode)
External RESET pin (during stop mode)
Watchdog timer
Loss of clock
Loss of lock
Software
LVD reset
Freescale Semiconductor, Inc.
For More Information On This Product,
defines the sources of reset and the signals driven by the reset
Go to: www.freescale.com
Reset Controller Module
Source
Table 5-3. Reset Source Summary
Asynchronous
Synchronous
Asynchronous
Synchronous
Asynchronous
Asynchronous
Synchronous
Asynchronous
Reset Controller Module
Functional Description
Type
Advance Information
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