HD6417616 RENESAS [Renesas Technology Corp], HD6417616 Datasheet - Page 780

• Manufacturer Part Number: HD6417616
• Description: 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 18 User Debug Interface (H-UDI)
TDO in the IDCODE mode. All registers, except SDBPR, SDBSR, and SDIDR, can be accessed
from the CPU.
Table 18.3 shows the kinds of serial transfer possible with each register.
Table 18.3 H-UDI Register Serial Transfer
18.2
18.2.1
The test clock pin (TCK) provides an independent clock supply to the H-UDI. As the clock input
to TCK is supplied directly to the H-UDI, a clock waveform with a duty cycle close to 50% should
be input (for details, see section 22, Electrical Characteristics). If no clock is input, TCK is fixed at
1 by internal pull-up.
18.2.2
The test mode select pin (TMS) is sampled on the rise of TCK. TMS controls the internal state of
the TAP controller. If no signal is input, TMS is fixed at 1 by internal pull-up.
18.2.3
The test data input pin (TDI) performs serial input of instructions and data for H-UDI registers.
TDI is sampled on the rise of TCK. If no signal is input, TDI is fixed at 1 by internal pull-up.
Rev. 2.00 Mar 09, 2006 page 754 of 906
REJ09B0292-0200
Register
SDIR
SDSR
SDDRH
SDDRL
SDBPR
SDBSR
SDIDR
Test Clock (TCK)
Test Mode Select (TMS)
Test Data Input (TDI)
External Signals
Serial Input
Possible
Impossible
Possible
Possible
Possible
Possible
Impossible
Serial Output
Possible
Possible
Possible
Possible
Possible
Possible
Possible