HD6417616 RENESAS [Renesas Technology Corp], HD6417616 Datasheet - Page 468

• Manufacturer Part Number: HD6417616
• Description: 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 10 Ethernet Controller Direct Memory Access Controller (E-DMAC)
Bit 2 to 0—Receive FIFO Depth (RFD): Specifies 256 bytes to 2 kbytes in 256-byte units as the
depth (size) of the receive FIFO. The actual FIFO depth is 256 times the set value. The setting
cannot be changed after transmission/reception has started.
Bits 2 to 0: RFD2 to RFD0
H'0
H'1
:
H'7
10.2.12 Receiver Control Register (RCR)
RCR specifies the control method for the RE bit in ECMR when a frame is received.
Note: When setting this register, do so in the receiving-halt state.
Bits 31 to 1—Reserved: These bits are always read as 0. The write value should always be 0.
Bit 0—Receive Enable Control (RNC)
Bit 0: RNC
0
1
Note: * This setting is normally used for continuous frame reception.
Rev. 2.00 Mar 09, 2006 page 442 of 906
REJ09B0292-0200
Initial value:
Initial value:
R/W:
R/W:
Bit:
Bit:
Description
When reception of one frame is completed, the E-DMAC writes the receive
status into the descriptor and clears the RR bit in EDRRR
When reception of one frame is completed, the E-DMAC writes the receive
status into the descriptor, reads the next descriptor, and prepares to receive
the next frame *
31
—
—
R
R
0
7
0
Description
256 bytes
512 bytes
2048 bytes
:
30
—
—
R
R
0
6
0
29
—
—
R
R
0
5
0
. . .
. . .
. . .
. . .
—
R
4
0
11
—
—
R
R
0
3
0
10
—
—
R
R
0
2
0
—
—
R
R
9
0
1
0
(Initial value)
(Initial value)
RNC
R/W
—
R
8
0
0
0