HD6417616 RENESAS [Renesas Technology Corp], HD6417616 Datasheet - Page 410

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HD6417616

Manufacturer Part Number
HD6417616
Description
32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Section 9 Ethernet Controller (EtherC)
Bit 0—Illegal Carrier Detection (ICD): Indicates that PHY-LSI has detected an illegal carrier on
the line. This bit is cleared by writing 1 to it. Writing 0 to this bit has no effect.
Bit 0: ICD
0
1
Note: If a change in the signal input from the PHY-LSI occurs before the software recognition
9.2.3
This register enables or disables the interrupt sources indicated by the EtherC status register. Each
bit in this register enables or disables the interrupt indicated by the corresponding bit in the EtherC
status register.
Bits 31 to 3—Reserved: These bits are always read as 0. The write value should always be 0.
Bit 2— LINK Signal Changed Interrupt Permission (LCHNGIP): Controls interrupt notification
by the LINK Signal Changed bit.
Bit 2: LCHNGIP
0
1
Rev. 2.00 Mar 09, 2006 page 384 of 906
REJ09B0292-0200
Initial value:
Initial value:
period, the correct information may not be obtained. Refer to the timing specification for the
PHY-LSI used.
EtherC Interrupt Permission Register (ECSIPR)
R/W:
R/W:
Bit:
Bit:
Description
PHY-LSI has not detected an illegal carrier on the line
PHY-LSI has detected an illegal carrier on the line
Interrupt notification by LCHNG bit in ECSR is disabled
Interrupt notification by LCHNG bit in ECSR is enabled
Description
31
R
R
0
7
0
30
R
R
0
6
0
29
R
R
0
5
0
. . .
. . .
. . .
. . .
R
4
0
11
R
R
0
3
0
LCHNGI
R/W
10
R
P
0
2
0
MPDIP
R/W
R
9
0
1
0
(Initial value)
(Initial value)
ICDIP
R/W
R
8
0
0
0

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