HD6417616 RENESAS [Renesas Technology Corp], HD6417616 Datasheet - Page 601

• Manufacturer Part Number: HD6417616
• Description: 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Bit 0—Receive Data Ready (DR): Indicates that there are fewer than the receive trigger set
number of data bytes in the receive FIFO data register (SCFRDR), and no further data has arrived
for at least 16 etu after the stop bit of the last data received.
Bit 0: DR
0
1
Notes: 1. All remaining receive data should be read before clearing the DR flag.
14.2.8
Note: * Only 0 can be written, to clear the flag.
The serial status 2 register (SC2SSR) is an 8-bit register.
SC2SSR can be read or written to at all times. However, 1 cannot be written to the ORER flag.
Also note that in order to clear this flag to 0, they must first be read as 1.
SC2SSR is initialized to H'20 by a reset, by the module standby function, and in standby mode.
Initial value:
2. Equivalent to 1.6 frames when using an 8-bit, 1-stop-bit format.
Serial Status 2 Register (SC2SSR)
etu: Elementary time unit = sec/bit
R/W:
Bit:
Description
Reception is in progress or has ended normally and there is no receive data left
in SCFRDR
[Clearing conditions]
No further receive data has arrived, and SCFRDR contains fewer than the
receive trigger set number of data bytes
[Setting condition]
When SCFRDR contains fewer than the receive trigger set number of receive
data bytes, and no further data has arrived for at least 16 etu after the stop bit
of the last data received *
TLM
R/W
7
0
In a reset or in standby mode
When 0 is written to DR after all the remaining receive data has been
read *
1
RLM
R/W
6
0
Section 14 Serial Communication Interface with FIFO (SCIF)
R/W
N1
5
1
2
R/W
N0
4
0
Rev. 2.00 Mar 09, 2006 page 575 of 906
MPB
R
3
0
MPBT
R/W
2
0
REJ09B0292-0200
R/W
EI
1
0
(Initial value)
R/(W) *
ORER
0
0