HD6417616 RENESAS [Renesas Technology Corp], HD6417616 Datasheet - Page 744

• Manufacturer Part Number: HD6417616
• Description: 32-Bit RISC Microcomputer SuperH™ RISC engine Family/SH7600 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 17 16-Bit Timer Pulse Unit (TPU)
17.4.4
Buffer operation, provided for channel 0 enables TGRC and TGRD to be used as buffer registers.
Buffer operation differs depending on whether TGR has been designated as an input capture
register or as a compare match register.
Table 17.5 shows the register combinations used in buffer operation.
Table 17.5 Register Combinations in Buffer Operation
Rev. 2.00 Mar 09, 2006 page 718 of 906
REJ09B0292-0200
Channel
0
Buffer register
When TGR is an output compare register
When a compare match occurs, the value in the buffer register for the corresponding channel is
transferred to the timer general register.
This operation is illustrated in figure 17.16.
Buffer Operation
Figure 17.16 Compare Match Buffer Operation
Timer General Register
TGR0A
TGR0B
Compare match signal
Timer general
register
Comparator
Buffer Register
TGR0C
TGR0D
TCNT