MC68HC912BD32CFU10 FREESCALE [Freescale Semiconductor, Inc], MC68HC912BD32CFU10 Datasheet - Page 75

• Manufacturer Part Number: MC68HC912BD32CFU10
• Description: Advance Information
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Operation
Bootstrap
Operation
Single-Chip Mode
Normal Operation
Program/Erase
Operation
7-flash
The Flash EEPROM can contain program and data. On reset, it can
operate as a bootstrap memory to provide the CPU with internal
initialization information during the reset sequence.
After reset, the CPU controlling the system will begin booting up by
fetching the first program address from address $FFFE.
The Flash EEPROM allows a byte or aligned word read/write in one bus
cycle. Misaligned word read/write require an additional bus cycle. The
Flash EEPROM array responds to read operations only. Write
operations are ignored.
An unprogrammed Flash EEPROM bit has a logic state of one. A bit
must be programmed to change its state from one to zero. Erasing a bit
returns it to a logic one. The Flash EEPROM has a minimum
program/erase life of 100 cycles. Programming or erasing the Flash
EEPROM is accomplished by a series of control register writes and a
write to a set of programming latches.
Programming is restricted to a single byte or aligned word at a time as
determined by internal signal SZ8 and ADDR[0]. The Flash EEPROM
must first be completely erased prior to programming final data values.
It is possible to program a location in the Flash EEPROM without erasing
Freescale Semiconductor, Inc.
For More Information On This Product,
ENPE
0
0
0
1
Table 1 Effects of ENPE, LAT and ERAS on Array Reads
Go to: www.freescale.com
LAT
0
1
1
–
Flash EEPROM
ERAS
–
0
1
–
Normal read of location addressed
Read of location being programmed
Normal read of location addressed
Read cycle is ignored
Result of Read
MC68HC912BD32 Rev 1.0
Flash EEPROM
Operation