MC68HC912BD32CFU10 FREESCALE [Freescale Semiconductor, Inc], MC68HC912BD32CFU10 Datasheet - Page 179

• Manufacturer Part Number: MC68HC912BD32CFU10
• Description: Advance Information
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

9-sibus
t_wx
t_wx0_tx
t_wx0_rx
t_latest_tx
t_start_seq_tx length of tx start sequence t_start_seq_tx is currently hard wired
t_start_seq_rx
t_start_seq_rx
t_wx_delta
t_recognize
t_wake_up
1. 249.75 s<=t_cyc<=250.25 s in 100% of cases there is no error, t_cyc<249.7 s or t>250.3 s in 100% of cases sync too
2. 1.875 s<=t_syn_a<=2.125 s in 100% of cases sync alarm is accepted, t_syn_a<1.825 s or t_syn_a>2.175 s in 100% of
3. 2.875 s<=t_syn_n<=3.125 s in 100% of cases sync normal is accepted, t_syn_n<2.825 s or t_syn_n>3.175 s in 100%
early/ lost
sync alarm is not accepted, but illegal pulse is detected
of sync normal is not accepted, but illegal pulse is detected
Symbol
message idle time
constant part of t_wx when
last bus activity was
transmitted
constant part of t_wx when
last bus activity was
received
latest start of transmit
length of rx start sequence
(max)
length of rx start sequence
(min)
multiplier part of t_wx
recognition time for bus
activity
length of wake up pulse
Characteristic
Table 34 Parameter of the Byteflight™ System
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time between the end of the Sync pulse or end of the
previous message and the start of the transmitted
message.
t_wx >= t_idle_min
t_wx = twx0_tx + twx_delta * (ID - IDx-1), when the
node sent the last activity on the bus
t_wx = twx0_rx + twx_delta * (ID - IDx-1), when the
node received the last activity on the bus
t_wx0_tx can be programmed individually for each
node in the register TCR1
t_wx0_rx can be programmed individually for each
node in the register TCR2
t_latest_tx is currently hard wired
t_start_seq_rx is currently hard wired
t_start_seq_rx is currently hard wired
this value must be assigned identically for each node
using register TCR3. t_wx_delta = t_max +
t_tolerance
time required for recognition of bus activity: time
from falling edge of RX pin until the bus controller
can stop a waiting transmit process
a sequence of dominant and recessive pulses of
length t_wake_up is sent out if WPULSE is set
Byteflight™ Module
Description
MC68HC912BD32 Rev 1.0
Byteflight™ Protocol
Byteflight™ Module
<1900ns
<1900ns
229.0 s
600ns
975ns
100ns
< 1200ns
> 200ns
<125ns
6.4 s
Typ