MC68HC912BD32CFU10 FREESCALE [Freescale Semiconductor, Inc], MC68HC912BD32CFU10 Datasheet - Page 121

• Manufacturer Part Number: MC68HC912BD32CFU10
• Description: Advance Information
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

PWEN — PWM Enable
9-pwm
RESET:
Bit 7
0
0
PWEN3 — PWM Channel 3 Enable
PWEN2 — PWM Channel 2 Enable
PWEN1 — PWM Channel 1 Enable
Read and Write any time.
Setting any of the PWENx bits causes the associated port P line to
become an output regardless of the state of the associated data
direction register (DDRP) bit. This does not change the state of the
data direction bit. When PWENx returns to zero, the data direction bit
controls I/O direction. On the front end of the PWM channel, the scaler
clock is enabled to the PWM circuit by the PWENx enable bit being
high. When all four PWM channels are disabled, the prescaler
counter shuts off to save power. There is an edge-synchronizing gate
circuit to guarantee that the clock will only be enabled or disabled at
an edge.
Read and write anytime.
The pulse modulated signal will be available at port P, bit 3 when its
clock source begins its next cycle.
The pulse modulated signal will be available at port P, bit 2 when its
clock source begins its next cycle.
The pulse modulated signal will be available at port P, bit 1 when its
clock source begins its next cycle.
Freescale Semiconductor, Inc.
6
0
0
For More Information On This Product,
0 = Channel 3 is disabled.
1 = Channel 3 is enabled.
0 = Channel 2 is disabled.
1 = Channel 2 is enabled.
0 = Channel 1 is disabled.
1 = Channel 1 is enabled.
Go to: www.freescale.com
5
0
0
Pulse Width Modulator
4
0
0
PWEN3
3
0
PWEN2
2
0
MC68HC912BD32 Rev 1.0
PWEN1
PWM Register Description
1
0
Pulse Width Modulator
PWEN0
Bit 0
0
$0042