MC68HC912BD32CFU10 FREESCALE [Freescale Semiconductor, Inc], MC68HC912BD32CFU10 Datasheet - Page 218
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MC68HC912BD32CFU10
Manufacturer Part Number
MC68HC912BD32CFU10
Description
Advance Information
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MC68HC912BD32CFU10.pdf
(292 pages)
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PCTLSBI
$xx10
Module Version
Register (MVR)
MVR
$xx0E
Byteflight™ Port
SBI Control
Register (PCTLSBI)
Byteflight™ Module
MC68HC912BD32 Rev 1.0
HARDRESET
W
W
R
R
PMEREN
MVR7
BIT 7
BIT 7
0
Figure 52 Port SBI Control Register (PCTLSBI)
The read-only Module Version Register contains the version number of
the implementation.
PMEREN — Slot Mismatch Error Enable
PSLMEN — Slot Mismatch Enable
PERREN — Error Pulse Enable
PROKEN — Reception OK Pulse Enable
Figure 51 Module Version Register (MVR)
MVR6
BIT 6
BIT 6
The following bits control pins of Port SBI. Pins 1 and 0 are reserved
for the Rx (input only) and Tx (output only) pins. Only a hard reset will
clear the register.
Freescale Semiconductor, Inc.
0
0
For More Information On This Product,
1 = A 50ns pulse is driven on Port SBI4 after a slot mismatch.
0 = Port SBI4 is a general IO pin.
1 = A 50ns pulse is driven on Port SBI5 after a slot mismatch.
0 = Port SBI5 is a general IO pin.
1 = A 50ns pulse is driven on Port SBI4 after a message format or
0 = Port SBI4 is a general IO pin.
1 = A 50ns pulse is driven on Port SBI3 after the successful
0 = Port SBI3 is a general IO pin.
illegal pulse error.
reception of a message or sync pulse.
PSLMEN
MVR5
BIT 5
BIT 5
Go to: www.freescale.com
0
Byteflight™ Module
PERREN
MVR4
BIT 4
BIT 4
0
PROKEN
MVR3
BIT 3
BIT 3
0
PSYNEN
MVR2
BIT 2
BIT 2
0
PUESBI
MVR1
BIT 1
BIT 1
0
RDRSBI
MVR0
BIT 0
BIT 0
0
48-sibus
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