FDC37N769_07 SMSC [SMSC Corporation], FDC37N769_07 Datasheet - Page 27

• Manufacturer Part Number: FDC37N769_07
• Description: 3.3V Super I/O Controller with Infrared Support for Portable Applications
• Manufacturer: SMSC [SMSC Corporation]

DIGITAL INPUT REGISTER (DIR)
The Digital Input Register (Bass Address + 7: Read-only) is read-only in all modes. Table 26 shows the DIR in PC/AT
mode, Table 27 shows the DIR in PS/2 mode, and Table 28 shows the DIR in Model 30 mode.
PC-AT Interface Mode
Undefined, Bits 0 - 6
The data bus outputs D0 - 6 will remain in a high impedance state during a read of this register.
DSK CHG, Bit 7
The DSK CHG bit monitors the state of the pin of the same name and reflects the opposite value seen on the disk
cable. The DSK CHG bit also depends upon the Force Disk Change bits in the Force FDD Status Change register
(see section CR17 on page 107).
PS/2 Interface Mode
nHIGH DENS, Bit 0
This bit is low whenever the 500 Kbps or 1 Mbps data rates are selected, and high when 250 Kbps and 300 Kbps are
selected.
Data Rate Select, Bits 1 - 2
These bits control the data rate of the floppy controller. See Table 22 for the settings corresponding to the individual
data rates. The data rate select bits are unaffected by a software reset, and are set to 250 Kbps after a hardware
reset.
Undefined, Bits 3 - 6
Always read as a logic “1”
DSK CHG, Bit 7
The DSK CHG bit monitors the pin of the same name and reflects the opposite value seen on the disk cable. The
DSK CHG bit also depends upon the Force Disk Change bits in the Force FDD Status Change register (see section
CR17 on page 107).
SMSC DS – FDC37N769
1 byte
2 bytes
8 bytes
15 bytes
THRESHOLD
EXAMPLES
FIFO
CONDITION
RESET
CONDITION
RESET
1 x 4μs - 1.5μs = 2.5μs
2 x 4μs - 1.5μs = 6.5μs
8 x 4μs - 1.5μs = 30.5μs
15 x 4μs - 1.5μs = 58.5μs
DSK CHG
N/A
7
2Mbps
DSK CHG
Table 25 - Example FIFO Service Delays
Table 26 - DIR PC/AT Interface Mode
N/A
Table 27 - DIR PS/2 Interface Mode
N/A
7
6
1
DATASHEET
N/A
5
1
N/A
6
Page 27 of 137
1 x 8μs - 1.5μs = 6.5μs
2 x 8μs - 1.5μs = 14.5μs
8 x 8μs - 1.5μs = 62.5μs
15 x 8μs - 1.5μs = 118.5μs
N/A
4
1
EXAMPLE DATA RATES
N/A
5
N/A
3
1
1Mbps
N/A
4
DRATE
SEL1
N/A
N/A
3
2
N/A
2
DRATE
1 x 16μs - 1.5μs = 14.5μs
2 x 16μs - 1.5μs = 30.5μs
8 x 16μs - 1.5μs = 126.5μs
15 x 16μs - 1.5μs = 238.5μs
SEL0
N/A
N/A
1
1
N/A
500Kbps
0
nHIGH
DENS
0
1
Rev. 02-16-07