FDC37N769_07 SMSC [SMSC Corporation], FDC37N769_07 Datasheet - Page 105

• Manufacturer Part Number: FDC37N769_07
• Description: 3.3V Super I/O Controller with Infrared Support for Portable Applications
• Manufacturer: SMSC [SMSC Corporation]

CR0D
CR0D can only be accessed in the configuration state and after the CSR has been initialized to 0DH. This register is
read only. CR0D contains the FDC37N769 Device ID. The default value of this register after power up is 28H.
CR0E
CR0E can only be accessed in the configuration state and after the CSR has been initialized to 0EH. This register is
read only. CR0E contains the current FDC37N769 Chip Revision Level.
CR0F
CR0F can only be accessed in the configuration state and after the CSR has been initialized to 0FH. The default
value of this register after power up is 00H (Table 92). CR0F is a test control register and all bits must be treated as
Reserved. Note: all test modes are reserved for SMSC use. Activating test mode registers may produce undesired
results.
CR10
CR10 can only be accessed in the configuration state and after the CSR has been initialized to 10H. The default
value of this register after power up is 00H (Table 93). CR10 is a test control register and all bits must be treated as
Reserved. NOTE: all test modes are reserved for SMSC use. Activating test mode registers may produce undesired
results.
SMSC DS – FDC37N769
BIT NO.
BIT NO.
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
DATASHEET
BIT NAME
BIT NAME
Test 10
Test 11
Test 12
Test 13
Test 14
Test 15
Test 0
Test 1
Test 2
Test 3
Test 4
Test 5
Test 6
Test 7
Test 8
Test 9
Table 92 - CR0F
Table 93 - CR10
Page 105 of 137
RESERVED FOR SMSC USE
RESERVED FOR SMSC USE
DESCRIPTION
DESCRIPTION
Rev. 02-16-07