FDC37M81 SMSC [SMSC Corporation], FDC37M81 Datasheet - Page 178

• Manufacturer Part Number: FDC37M81
• Description: PC98/99 Compliant Enhanced Super I/O Controller with Keyboard/Mouse Wake-Up
• Manufacturer: SMSC [SMSC Corporation]

*X specifies one MCLK period and Y specifies one WCLK period.
MCLK = 16 x Data Rate (at 500 kb/s MCLK = 8 MHz)
WCLK = 2 x Data Rate (at 500 kb/s WCLK = 1 MHz)
NAME
nWDATA
nRDATA
nINDEX
nDS0-1,
nMTR0-1
nDS0-3
nSTEP
nIOW
t1
t2
t3
t4
t5
t6
t7
t8
t9
nDIR
nDIR Set Up to STEP Low
nSTEP Active Time Low
nDIR Hold Time after nSTEP
nSTEP Cycle Time
nDS0-1 Hold Time from nSTEP Low
nINDEX Pulse Width
nRDATA Active Time Low
nWDATA Write Data Width Low
nDS0-1, MTRO-1 from End of nIOW
FIGURE 11 - DISK DRIVE TIMING (AT MODE ONLY)
t9
DESCRIPTION
t1
t6
t7
t8
t2
178
t4
MIN
t5
TYP
132
24
96
20
40
25
.5
4
2
MAX
t9
UNITS
X*
X*
X*
X*
X*
X*
ns
Y*
ns