FDC37M81 SMSC [SMSC Corporation], FDC37M81 Datasheet - Page 155

• Manufacturer Part Number: FDC37M81
• Description: PC98/99 Compliant Enhanced Super I/O Controller with Keyboard/Mouse Wake-Up
• Manufacturer: SMSC [SMSC Corporation]

KRST_GA20
Default = 0x00
on VCC POR, VTR
POR and HARD
RESET
NAME
Table 62 - KYBD, Logical Device 7 [Logical Device Number = 0x07]
0xF1 -
0xFF
REG INDEX
0xF0
R/W
KRESET and GateA20 Select
Bit[7] Polarity Select for P12
Bit[6] M_ISO. Enables/disables isolation of mouse
signals into 8042. Does not affect MDAT signal to
mouse wakeup (PME) logic.
1=block mouse clock and data signals into 8042
0= do not block mouse clock and data signals into
8042
Bit[5] K_ISO. Enables/disables isolation of keyboard
signals into 8042. Does not affect KDAT signal to
keyboard wakeup (PME) logic.
1=block keyboard clock and data signals into 8042
0= do not block keyboard clock and data signals into
8042
Bit[4] MLATCH
MINT (default)
Bit[3] KLATCH
KINT (default)
Bit[2] Port 92 Select
Bit[1] Reserved
Bit[0] Reserved
Reserved - read as ‘0’
= 0 MINT is the 8042 MINT ANDed with Latched
= 1 MINT is the latched 8042 MINT
= 0 KINT is the 8042 KINT ANDed with Latched
= 1 KINT is the latched 8042 KINT
= 0 P12 active low (default)
= 1 P12 active high
= 0 Port 92 Disabled
= 1 Port 92 Enabled
155
DEFINITION
STATE