FDC37M81 SMSC [SMSC Corporation], FDC37M81 Datasheet - Page 120
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FDC37M81
Manufacturer Part Number
FDC37M81
Description
PC98/99 Compliant Enhanced Super I/O Controller with Keyboard/Mouse Wake-Up
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.FDC37M81.pdf
(198 pages)
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KEYBOARD ISA INTERFACE
The FDC37M81x ISA interface is functionally
compatible with the 8042 style host interface. It
consists of the D0-7 data bus; the nIOR, nIOW
and
Note 1: These registers consist of three separate 8 bit registers. Status, Data/Command Write and
ISA ADDRESS
0x60
0x64
the
Data Read.
Status
nIOW
0
1
0
1
register,
nIOR
Table 47 - ISA I/O Address Map
Input
1
0
1
0
Data
BLOCK
KDATA
KDATA
KDCTL
KDCTL
120
register, and Output Data register. Table 47
shows how the interface decodes the control
signals. In addition to the above signals, the
host interface includes keyboard and mouse
IRQs.
Keyboard Data Write (C/D=0)
Keyboard Data Read
Keyboard Command Write (C/D=1)
Keyboard Status Read
FUNCTION (NOTE 1)