TMC22191 CADEKA [Cadeka Microcircuits LLC.], TMC22191 Datasheet - Page 39
TMC22191
Manufacturer Part Number
TMC22191
Description
Digital Video Encoders/Layering Engine
Manufacturer
CADEKA [Cadeka Microcircuits LLC.]
Datasheet
1.TMC22191.pdf
(60 pages)
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PRODUCT SPECIFICATION
Internal Pixel Data Control
When programmed as an output, PDC goes HIGH four
PXCK periods prior to the end of CBP (as programmed in
the horizontal timing registers) which is also four PXCK
cycles prior to required input of the first pixel of a line.
POST-FILTER
POST-FILTER
COMPOSITE
COMPOSITE
OUTPUT
OUTPUT
OUTPUT
OUTPUT
PXCK
PXCK
PDC
PDC
PD
PD
t
DO
P 1
P 1
P 2
P 2
Figure 17. External Pixel Data Control
Figure 18. Internal Pixel Data Control
P 3
P 3
P 4
P 4
Pixels produced by the encoder appear at the analog outputs
(COMPOSITE, LUMA, CHROMA) 40 clocks after they are
registered into the PD port. Note that the pixels enter at one-
half the PXCK rate. The encoded signal passes through
interpolation filters which generate intermediate output val-
ues, improving the output frequency response and greatly
simplifying the external reconstruction filter. The interpo-
lated pixels are designated PI in the diagram.
P 19
P 19
P 20
P 20
P 21
P 21
P 1
P 1
P 22
P 22
PI 1
PI 1
P 2 PI 2 P 3
P 2 PI 2 P 3
P 23
P 23
TMC22091/TMC22191
P 24
P 24
24358A
24357A
39
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