TMC22191 CADEKA [Cadeka Microcircuits LLC.], TMC22191 Datasheet - Page 10

• Manufacturer Part Number: TMC22191
• Description: Digital Video Encoders/Layering Engine
• Manufacturer: CADEKA [Cadeka Microcircuits LLC.]

PRODUCT SPECIFICATION
Pin Descriptions
Control Registers
The TMC22x91 is initialized and controlled by a set of regis-
ters. The registers are organized into 13 categories:
1. Global Control
2. Format Control
3.
4. Test Control
5.
6. Misc. Control
7. Standards Control
8. Layering Control (TMC22191)
9. Key Value
10. Timing
11. Subcarrier
12. Test I/O
13. Mask Register
An external controller loads the Control Registers through a
standard interface port. It also loads the CLUT and reads its
Pin Name
Test
TEST
NC
Interface Control
Key Control
84-Lead
28, 29,
PLCC
48-51
N/A
Pin Number
(continued)
100-Lead
69, 78-79
1, 3, 7,
MQFP
22-25,
11-12,
28-30,
52-55,
96-97
Value
0.0 V
Pin Function Description
Factory testing (TMC22091 only). Reserved for factory
testing. These pins have no effect on the operation but do
function as JTAG registers. They should be grounded directly
or pulled down to ground with 1k or smaller resistors.
No Connect
contents or those of the Control Registers. The port is
governed by pins CS, R/W, and A
The Address Register for the CLUT and the Control Register
pointer automatically increment to allow successive writes to
sequential addresses. In the CLUT, the Address Register has
two additional bits which increment in modulo-three to
sequentially access the red, green, and blue portions. All
three colors must be written when any CLUT address is
changed.
The control register autoincrement follows the sequence
indicated in the Control Register Map. When it reaches
address 40, it stops incrementing, allowing multiple reads or
writes of test data from/to the TESTDAT register. To exit the
test mode, reset the Control Register pointer by setting A
D
a read-only status register. It is addressed by the autoincre-
ment sequencer. Any data may be written into this port at
that time but it will not be stored. When address 50 is
accessed, no autoincrement takes place, allowing multiple
writes to the Mask Register.
7-0
, and R/W LOW and then bring CS LOW. Address 1F is
1-0
.
TMC22091/TMC22191
1-0
10
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