TMC22191 CADEKA [Cadeka Microcircuits LLC.], TMC22191 Datasheet - Page 3

• Manufacturer Part Number: TMC22191
• Description: Digital Video Encoders/Layering Engine
• Manufacturer: CADEKA [Cadeka Microcircuits LLC.]

PRODUCT SPECIFICATION
Mask Register
A Mask Register is provided which is logically ANDed with
incoming color-index data to facilitate pixel animation and
other special graphics effects. The Mask Register is ahead of
the Data Key comparators and is enabled only when color-
index input is selected. Mask Register programming and
operation are similar to that of the 171/176 family of graph-
ics RAMDACS.
Color Lookup Table
The Color Lookup Table (CLUT) is a 256 x 8 x 3 random-
access memory. It provides means for offset, gain, gamma,
and color correction in RGB and YC
provides a full 24-bit color lookup function for color-index
mode. It can be loaded in the same manner as a standard
VGA RAMDAC.
MODE
GBR444
RGB444
YC B C R 444
YC B C R 422
COLOR INDEX
GBR15
RGB15
MSB
23
G
R
Y
Y
7
7
7
7
G
R
Y
Y
B
C
R
operating modes. It
G
R
Y
Y
16
0
0
0
0
C
C
C
B 7
G
15
B7
B7
R7
Figure 1a. Pixel Data Format
7
G
R
4
4
C
G
R
B /
C
G
B
B
C
R
G
R
0
0
Colorspace Conversion Matrix and
Interpolator
The matrix converts RGB data (whether from RGB inputs or
color-indexed CLUT data) into Y, B-Y, R-Y format for
encoding. In input configurations where the pixel input is
already in Y, B-Y, R-Y format, the matrix is bypassed. When
pixel data is input in YC
ters produce YC
Sync Generator
The TMC22x91 can operate in Master, Genlock, or Slave
modes. In Master and Genlock modes, the encoder internally
generates all timing and sync signals, and provides Horizon-
tal Sync, Vertical Sync, and Pixel Data Control (PDC) to the
external frame buffer circuitry. PDC is independently select-
able to function as an input or an output. In Genlock mode,
the TMC22x91 timing is controlled by the TMC22071 Gen-
locking Video Digitizer over the CVBS
and GHSYNC. The encoder, in turn, produces VHSYNC,
VVSYNC, and PDC for the frame buffer interface.
G
B
4
4
C
C
C
G
B
8 7
R0
B0
B0
0
0
G
R
B
R
B
P
R7
7
7
7
G
B
0
0
Pixel
R
B
C
B
R
B
4
4
C
R
R
444 for encoding.
R
B
B
C
24300A
R
LSB
R
R
B
P
R
B
422 format, the interpolation fil-
R0
0
0
0
0
0
0
Format Control Register
MSB
00011000
00010000
00011100
00011101
0001X011
00011010
00010010
7-0
TMC22091/TMC22191
bus, GVSYNC,
LSB
3