PIC18F2331 MICROCHIP [Microchip Technology], PIC18F2331 Datasheet - Page 80

no-image

PIC18F2331

Manufacturer Part Number
PIC18F2331
Description
28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F2331-I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
PIC18F2331-I/SP
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC18F2331/2431/4331/4431
6.2.2
The Table Latch (TABLAT) is an 8-bit register mapped
into the SFR space. The Table Latch is used to hold
8-bit data during data transfers between program
memory and data RAM.
6.2.3
The Table Pointer (TBLPTR) addresses a byte within
the program memory. The TBLPTR is comprised of
three SFR registers: Table Pointer Upper Byte, Table
Pointer High Byte and Table Pointer Low Byte
(TBLPTRU:TBLPTRH:TBLPTRL). These three regis-
ters join to form a 22-bit wide pointer. The low order 21
bits allow the device to address up to 2 Mbytes of pro-
gram memory space. Setting the 22nd bit allows
access to the Device ID, the User ID and the
Configuration bits.
The TBLPTR is used by the TBLRD and TBLWT instruc-
tions. These instructions can update the TBLPTR in
one of four ways based on the table operation. These
operations are shown in Table 6-1. These operations
on the TBLPTR only affect the low order 21 bits.
TABLE 6-1:
FIGURE 6-3:
DS39616B-page 78
TBLRD*+
TBLWT*+
TBLRD*-
TBLWT*-
TBLRD+*
TBLWT+*
Example
TBLRD*
TBLWT*
21
TABLAT
TBLPTR
REGISTER
TABLE POINTER OPERATIONS WITH TBLRD AND TBLWT INSTRUCTIONS
TBLPTRU
TABLE POINTER BOUNDARIES BASED ON OPERATION
TABLE LATCH REGISTER
TABLE POINTER
16
ERASE – TBLPTR<21:6>
15
TBLPTR is incremented before the read/write
TBLPTR is decremented after the read/write
TBLPTR is incremented after the read/write
LONG WRITE – TBLPTR<21:3>
TBLPTRH
Preliminary
READ or WRITE – TBLPTR<21:0>
Operation on Table Pointer
TBLPTR is not modified
6.2.4
TBLPTR is used in reads, writes and erases of the
Flash program memory.
When a TBLRD is executed, all 22 bits of the Table
Pointer determine which byte is read from program or
configuration memory into TABLAT.
When a TBLWT is executed, the three LSbs of the Table
Pointer (TBLPTR<2:0>) determine which of the eight
program memory holding registers is written to. When
the timed write to program memory (long write) begins,
the 19 MSbs of the Table Pointer, TBLPTR
(TBLPTR<21:3>), will determine which program
memory block of 8 bytes is written to (TBLPTR<2:0>
are ignored). For more detail, see Section 6.5
“Writing to Flash Program Memory”.
When an erase of program memory is executed, the 16
MSbs of the Table Pointer (TBLPTR<21:6>) point to the
64-byte block that will be erased. The Least Significant
bits (TBLPTR<5:0>) are ignored.
Figure 6-3 describes the relevant boundaries of
TBLPTR based on Flash program memory operations.
8
7
TABLE POINTER BOUNDARIES
TBLPTRL
 2003 Microchip Technology Inc.
0

Related parts for PIC18F2331