PIC18F2331 MICROCHIP [Microchip Technology], PIC18F2331 Datasheet - Page 214

• Manufacturer Part Number: PIC18F2331
• Description: 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18F2331/2431/4331/4431
REGISTER 18-1:
DS39616B-page 212
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
SSPSTAT: SYNC SERIAL PORT STATUS REGISTER (ADDRESS 94h)
bit 7
SMP: SPI Data Input Sample Phase bit
SPI Master mode:
1 = Input data sampled at end of data output time
0 = Input data sampled at middle of data output time (Microwire
SPI Slave mode:
SMP must be cleared when SPI is used in Slave mode
I
This bit must be maintained clear
CKE: SPI Clock Edge Select bit (Figure 18-2, Figure 18-3, and Figure 18-4)
SPI mode, CKP = 0:
1 = Data transmitted on rising edge of SCK (Microwire
0 = Data transmitted on falling edge of SCK
SPI mode, CKP = 1:
1 = Data transmitted on falling edge of SCK (Microwire
0 = Data transmitted on rising edge of SCK
I
This bit must be maintained clear
D/A: Data/Address bit (I
1 = Indicates that the last byte received or transmitted was data
0 = Indicates that the last byte received or transmitted was address
P: Stop bit (I
This bit is cleared when the SSP module is disabled, or when the Start bit is detected last.
SSPEN is cleared.
1 = Indicates that a Stop bit has been detected last (this bit is ‘0’ on Reset)
0 = Stop bit was not detected last
S: Start bit (I
This bit is cleared when the SSP module is disabled, or when the Stop bit is detected last.
SSPEN is cleared.
1 = Indicates that a Start bit has been detected last (this bit is ‘0’ on Reset)
0 = Start bit was not detected last
R/W: Read/Write bit Information (I
This bit holds the R/W bit information following the last address match. This bit is only valid from
the address match to the next Start bit, Stop bit, or ACK bit.
1 = Read
0 = Write
UA: Update Address bit (10-bit I
1 = Indicates that the user needs to update the address in the SSPADD register
0 = Address does not need to be updated
BF: Buffer Full Status bit
Receive (SPI and I
1 = Receive complete, SSPBUF is full
0 = Receive not complete, SSPBUF is empty
Transmit (I
1 = Transmit in progress, SSPBUF is full
0 = Transmit complete, SSPBUF is empty
Legend:
R = Readable bit
- n = Value at POR reset
2
2
C mode:
C mode:
R/W-0
SMP
2
C mode only):
2
2
C mode only)
C mode only)
R/W-0
CKE
2
C modes):
2
C mode only)
D/A
R-0
Preliminary
W = Writable bit
‘1’ = Bit is set
2
C mode only)
2
C mode only)
R-0
P
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R-0
S
®
®
alternate)
default)
R/W
®
R-0
 2003 Microchip Technology Inc.
)
x = Bit is unknown
R-0
UA
R-0
BF
bit 0