PIC18F2331 MICROCHIP [Microchip Technology], PIC18F2331 Datasheet - Page 181

• Manufacturer Part Number: PIC18F2331
• Description: 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D
• Manufacturer: MICROCHIP [Microchip Technology]

FIGURE 16-14:
16.4
The IC and QEI sub-modules can each generate three
distinct interrupt signals; however, they share the use
of the same three interrupt flags in register PIR3. The
meaning of a particular interrupt flag at any given time
depends on which module is active at the time the
interrupt is set. The meaning of the flags in context are
summarized in Table 16-7.
When the IC submodule is active, the three flags
(IC1IF,
interrupt-on-capture event flags for their respective
input capture channels. The channel must be
configured for one of the events that will generate an
interrupt (see Section 16.1.7 “IC Interrupts” for more
information).
When the QEI is enabled, the IC1IF interrupt flag
indicates
measurement event, usually an update of the VELR
register. The IC2QEIF interrupt indicates that a position
measurement event has occurred. IC3DRIF indicates
that a direction change has been detected.
TABLE 16-7:
 2003 Microchip Technology Inc.
CAP1/INDX pin
(input to filter)
CAP1/INDX input
(output from filter)
Interrupt
IC2QEIF
IC3DRIF
IC1IF
Flag
Note 1: Only CAP1/INDX pin input is shown for simplicity. Similar event timing occurs on CAP2/QEA and CAP3/QEB pins.
IC and QEI Shared Interrupts
2: Noise filtering occurs in shaded portions of CAP1 input.
3: Filter’s group delay: T
IC2QEIF
an
T
CY
IC1 capture
IC2 capture
IC3 capture
(1)
IC Mode
(2)
interrupt
event
event
event
T
MEANING OF IC AND QEI
INTERRUPT FLAGS
GD
and
= 3T
FILTER TIMING DIAGRAM (CLOCK DIVIDER = 1:1)
CY
caused
Meaning
IC3DRIF)
Position measurement
GD
Direction change
Velocity register
= 3 T
QEI Mode
by
update
update
Noise glitch
CY
function
.
a
PIC18F2331/2431/4331/4431
velocity
(3)
Preliminary
as
16.5
16.5.1
Since the input capture can operate only when its time
base is configured in a Synchronous mode, the input
capture will not capture any events. This is because the
device’s internal clock has been stopped, and any
internal timers in synchronous modes will not incre-
ment. The prescaler will continue to count the events
(not synchronized).
When the specified capture event occurs, the CAPxIF
interrupt will be set. The Capture Buffer register will be
updated upon wake-up from sleep to the current TMR5
value. If the CAPxIF interrupt is enabled, the device will
wake-up from sleep. This effectively enables all input
capture channels to be used as the external interrupts.
16.5.2
All QEI functions are halted in Sleep mode.
Operation in Sleep Mode
3X INPUT CAPTURE IN SLEEP
MODE
QEI IN SLEEP MODE
Noise glitch
T
QEI
= 16T
(3)
CY
DS39616B-page 179