PIC18F2331 MICROCHIP [Microchip Technology], PIC18F2331 Datasheet - Page 131

• Manufacturer Part Number: PIC18F2331
• Description: 28/40/44-Pin Enhanced Flash Microcontrollers with nanoWatt Technology, High Performance PWM and A/D
• Manufacturer: MICROCHIP [Microchip Technology]

10.5
PORTE is a 4-bit wide bidirectional port. Three pins
(RE0/AN6, RE1/AN67 and RE2/AN8) are individually
configurable as inputs or outputs. These pins have
Schmitt Trigger input buffers. When selected as an
analog input, these pins will read as ‘0’s.
The corresponding Data Direction register is TRISE.
Setting a TRISE bit (= 1) will make the corresponding
PORTE pin an input (i.e., put the corresponding output
driver in a High-Impedance mode). Clearing a TRISE
bit (= 0) will make the corresponding PORTE pin an
output (i.e., put the contents of the output latch on the
selected pin).
TRISE controls the direction of the RE pins, even when
they are being used as analog inputs. The user must
make sure to keep the pins configured as inputs when
using them as analog inputs.
The Data Latch register (LATE) is also memory
mapped. Read-modify-write operations on the LATE
register read and write the latched output value for
PORTE.
 2003 Microchip Technology Inc.
Note:
Note:
PORTE, TRISE and LATE
Registers
On a Power-on Reset, RE2:RE0 are
configured as analog inputs.
PORTE is only available on PIC18F4X31
devices.
PIC18F2331/2431/4331/4431
Preliminary
The fourth pin of PORTE (MCLR/V
only pin. Its operation is controlled by the MCLRE con-
figuration
(CONFIG3H<7>). When selected as a port pin
(MCLRE = 0), it functions as a digital input only pin. As
such, it does not have TRIS or LAT bits associated with
its operation. Otherwise, it functions as the device’s
master clear input. In either configuration, RE3 also
functions as the programming voltage input during
programming.
EXAMPLE 10-5:
10.5.1
For PIC18F2X31 devices, PORTE is only available
when
(CONFIG3H<7> = 0). In these cases, PORTE is a
single bit, input only port comprised of RE3 only. The
pin operates as previously described.
CLRF
CLRF
MOVLW
MOVWF
bcf
MOVLW
MOVWF
Note:
master
PORTE
LATE
0x3F
ANSEL0
ANSEL1, 0
0x03
TRISE
On a Power-on Reset, RE3 is enabled as a
digital input only if Master Clear functionality
is disabled.
PORTE IN 28-PIN DEVICES
bit
in
clear
INITIALIZING PORTE
Configuration
; Initialize PORTE by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Configure A/D
; for digital inputs
;
; Value used to
; initialize data
; direction
; Set RE<0> as input
; RE<1> as output
; RE<2> as input
functionality
PP
DS39616B-page 129
/RE3) is an input
Register
is
disabled
3H