AD9540BCPZ-REEL AD [Analog Devices], AD9540BCPZ-REEL Datasheet - Page 6

• Manufacturer Part Number: AD9540BCPZ-REEL
• Description: 655 MHz Low Jitter Clock Generator
• Manufacturer: AD [Analog Devices]

AD9540
Parameter
CML OUTPUT DRIVER (OUT0)
LOGIC INPUTS (SDI/O, I/O_RESET, RESET,
I/O_UPDATE, S0, S1, S2, SYNC_IN)
LOGIC OUTPUTS (SDO, SYNC_OUT, STATUS)
POWER CONSUMPTION
WAKE-UP TIME (FROM POWER-DOWN MODE)
CRYSTAL OSCILLATOR (ON REFIN INPUT)
DIGITAL TIMING SPECIFICATIONS
Differential Output Voltage Swing
Maximum Toggle Rate
Common-Mode Output Voltage
Output Duty Cycle
Output Current
Output Rise Time
Output Fall Time
V
V
I
C
V
V
I
I
Total Power Consumed, All Functions On
IAVDD
IDVDD
IDVDD_I/O
ICPVDD
Power-Down Mode
Digital Power-Down (CFR1<7>)
DAC Power-Down (CFR2<39>)
RF Divider Power-Down (CFR2<23>)
Clock Driver Power-Down (CFR2<20>)
Charge Pump Full Power-Down (CFR2<4>)
Charge Pump Quick Power-Down (CFR2<3>)
Operating Range
Residual Phase Noise (@ 25 MHz)
CS to SCLK Setup Time TPRE
Period of SCLK (Write) TSCLKW
Period of SCLK (Read) TSCLKR
Serial Data Setup Time TDSU
Serial Data Hold Time TDHD
Data Valid Time TDV
INH
OH
OL
IH
IL
IN
OH
OH
Continuous
Rising Edge Surge
Falling Edge Surge
, Input Low Voltage
@ 10 Hz Offset
@ 100 Hz Offset
@ 1 kHz Offset
@ 10 kHz Offset
@ 100 kHz Offset
>1 MHz Offset
, Input High Voltage
, Maximum Input Capacitance
, I
, Output High Voltage
, Output Low Voltage
INL
, Input Current
6
7
5
8
Min
655
42
2.0
2.7
100
100
20
6
40
400
6.5
0
40
Rev. 0 | Page 6 of 32
Typ
720
1.75
7.2
20.9
13.5
250
250
±1
3
80
12
7
400
6
10
150
25
95
120
140
157
164
168
Max
58
0.8
±5
0.4
400
85
45
20
15
30
Unit
mV
V
%
mA
mA
mA
ps
ps
V
V
µA
pF
V
V
µA
µA
mW
mA
mA
mA
mA
mW
ns
µs
ns
µs
µs
ns
MHz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
ns
ns
ns
ns
ns
ns
50 Ω load to supply, both lines
Test Conditions/Comments
100 Ω terminated, 5 pF load
100 Ω terminated, 5 pF load