AD9540BCPZ-REEL AD [Analog Devices], AD9540BCPZ-REEL Datasheet - Page 18

• Manufacturer Part Number: AD9540BCPZ-REEL
• Description: 655 MHz Low Jitter Clock Generator
• Manufacturer: AD [Analog Devices]

AD9540
TYPICAL APPLICATION CIRCUITS
APPLICATION CIRCUIT DESCRIPTIONS
Dual Clock Configuration: AD9540 Configured in a
Dual-Clock Configuration
In this loop, M = 1, N = 16, and R = 4. The DDS tuning word is
also equals to ¼, so that the frequency of CLOCK 1’ equals the
frequency of CLOCK 1. Phase adjustments in the DDS provide
14-bit programmable rising edge delay capability of CLOCK 1’
with respect to CLOCK 1 (see Figure 32).
Optical Networking Clock: AD9540 Configured as an
Optical Networking Clock
The loop can be used to generate a 622 MHz clock for OC12.
The DDS can be programmed to output 8 kHz to serve as a base
reference for other circuits in the subsystem (see Figure 33).
CRYSTAL
25MHz
REFERENCE
EXTERNAL
AD9540
÷
÷
M
N
AD9540
DETECTOR
÷
÷
M
PHASE
N
REFIN
CLK2
DETECTOR
Figure 32. Dual Clock Configuration
Figure 33. Optical Networking Clock
PHASE
REFIN
CLK2
DDS
CHARGE
DDS
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PUMP
CHARGE
PUMP
÷
R
DAC
DAC
÷
R
VCO
CML
DRIVER
VCO
622MHz
CML
DRIVER
400MHz
CLOCK1
CLOCK2
CLOCK1
CLOCK1'