AD9540 Analog Devices, AD9540 Datasheet

AD9540

Manufacturer Part Number

AD9540

Description

655 MHZ Low Jitter Clock Generator

Manufacturer

Analog Devices

Datasheet

1.AD9540.pdf (32 pages)

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FEATURES

Excellent intrinsic jitter performance

25 Mb/s write-speed serial I/O control

200 MHz phase frequency detector inputs

655 MHz programmable input dividers for the phase fre-

Programmable RF divider (÷R) {R = 1, 2, 4, 8} (bypassable)

8 programmable internal clock rates

Programmable edge delay with 93 f

1.8 V supply for device operation

3.3 V supply for I/O, CML driver, and charge pump output

Software controlled power-down

48-lead LFCSP package

Programmable charge pump current (up to 4 mA)

Multichip synchronization

Dual-mode PLL lock detect

655 MHz CML-mode PECL-compliant driver

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable.

However, no responsibility is assumed by Analog Devices for its use, nor for any

infringements of patents or other rights of third parties that may result from its use.

Specifications subject to change without notice. No license is granted by implication

or otherwise under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective owners.

quency detector (÷M, ÷N) {M, N = 1..16} (bypassable)

SYNC_IN/STATUS

REFIN

SCLK

SDI/O

CLK1

SDO

resolution

AVDD AGND DVDD DGND VCML

CONTROL LOGIC

TIMING AND

SYNC, PLL

CONTROL

FREQUENCY

SERIAL

PROFILES

FUNCTIONAL BLOCK DIAGRAM

LOCK

PORT

PHASE/

DIVIDER

1, 2, 4, 8

M DIVIDER

N DIVIDER

655 MHz Low Jitter Clock Generator

Figure 1.

DIVCLK

VCP

CLK

FREQUENCY

APPLICATIONS

Clocking high performance data converters

Base station clocking applications

Network (SONET/SDH) clocking

Gigabit Ethernet (GbE) clocking

Instrumentation clocking circuits

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.326.8703

DETECTOR

PHASE

DDS

CP_RSET

REF, AMP

CHARGE

PUMP

DAC_RSET

CML

DAC

CLK2

DRV_RSET

OUT0

VCML

IOUT

www.analog.com

AD9540

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