h8s-2649 Renesas Electronics Corporation., h8s-2649 Datasheet - Page 65

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h8s-2649

Manufacturer Part Number
h8s-2649
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
2.4.5
This 64-bit register stores the results of multiply-and-accumulate operations. It consists of two 32-
bit registers denoted MACH and MACL. The lower 10 bits of MACH are valid; the upper bits are
a sign extension.
2.4.6
Reset exception handling loads the CPU’s program counter (PC) from the vector table, clears the
trace bit in EXR to 0, and sets the interrupt mask bits in CCR and EXR to 1. The other CCR bits
and the general registers are not initialized. In particular, the stack pointer (ER7) is not initialized.
The stack pointer should therefore be initialized by an MOV.L instruction executed immediately
after a reset.
Bit
1
0
Multiply-Accumulate Register (MAC)
Initial Values of CPU Registers
Bit Name
V
C
Initial
Value
Undefined R/W
Undefined R/W
R/W
Description
Overflow Flag
Set to 1 when an arithmetic overflow occurs, and
cleared to 0 at other times.
Carry Flag
Set to 1 when a carry occurs, and cleared to 0
otherwise. Used by:
The carry flag is also used as a bit accumulator by bit
manipulation instructions.
Add instructions, to indicate a carry
Subtract instructions, to indicate a borrow
Shift and rotate instructions, to indicate a carry
Rev. 2.00 Dec. 05, 2005 Page 27 of 724
REJ09B0200-0200
Section 2 CPU

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