h8s-2649 Renesas Electronics Corporation., h8s-2649 Datasheet - Page 590

no-image

h8s-2649

Manufacturer Part Number
h8s-2649
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 19 ROM
Rev. 2.00 Dec. 05, 2005 Page 552 of 724
REJ09B0200-0200
Notes:
1. Pre-writing (all erase block data are cleared to 0) is not necessary.
2. Verify data is read out in 16 bit size (word access).
3. Erasing block register (EBR) can be set about 1 bit at a time.
4. Erasing is performed block by block. when multiple blocks must be erased,
Increment address
Do not specify 2 bits or more.
erase each lock one by one.
Figure 19.10 Erase/Erase-Verify Flowchart
No
No
Set block start address as verify address
H'FF dummy write to verify address
SWE bit in FLMCR1 ← 1
SWE bit in FLMCR1 ← 0
ESU bit in FLMCR1 ← 1
ESU bit in FLMCR1 ← 0
All erase block erased?
EV bit in FLMCR1 ← 1
EV bit in FLMCR1 ← 0
Last address of block?
E bit in FLMCR1 ← 1
E bit in FLMCR1 ← 0
*4
Verify data = all 1?
tcswe: Wait 100 µs
tsesu: Wait 100 µs
tcesu: Wait 10 µs
Read verify data
tsswe: Wait 1 µs
tsev: Wait 20 µs
tse: Wait 10 ms
tsevr: Wait 2 µs
tce: Wait 10 µs
tcev: Wait 4 µs
End of erasing
Set EBR1 (2)
Disable WDT
Enable WDT
Erase start
n = 1
Yes
Yes
Yes
*1
No
*3
*2
SWE bit in FLMCR1 ← 0
EV bit in FLMCR1 ← 0
start erasing
stop erasing
tcswe: Wait 100 µs
tcev: Wait 4 µs
Erase failure
n ≥ 100?
Erasing should be
done to a block
Yes
No
n ← n + 1

Related parts for h8s-2649