h8s-2649 Renesas Electronics Corporation., h8s-2649 Datasheet - Page 448
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h8s-2649
Manufacturer Part Number
h8s-2649
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2649.pdf
(766 pages)
- Current page: 448 of 766
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Section 13 Serial Communication Interface (SCI)
13.7.8
When the GM bit in SMR is set to 1, the clock output level can be fixed with bits CKE0 and
CKE1 in SCR. At this time, the minimum clock pulse width can be made the specified width.
Figure 13.31 shows the timing for fixing the clock output level. In this example, GM is set to 1,
CKE1 is cleared to 0, and the CKE0 bit is controlled.
When turning on the power or switching between smart card interface mode and software standby
mode, the following procedures should be followed in order to maintain the clock duty cycle.
Powering On: To secure clock duty cycle from power-on, the following switching procedure
should be followed.
When changing from smart card interface mode to software standby mode:
Rev. 2.00 Dec. 05, 2005 Page 410 of 724
REJ09B0200-0200
1. The initial state is port input and high impedance. Use a pull-up resistor or pull-down
2. Fix the SCK pin to the specified output level with the CKE1 bit in SCR.
3. Set SMR and SCMR, and switch to smart card mode operation.
4. Set the CKE0 bit in SCR to 1 to start clock output.
1. Set the data register (DR) and data direction register (DDR) corresponding to the SCK pin
2. Write 0 to the TE bit and RE bit in the serial control register (SCR) to halt transmit/receive
3. Write 0 to the CKE0 bit in SCR to halt the clock.
4. Wait for one serial clock period.
CKE0
SCK
resistor to fix the potential.
to the value for the fixed output state in software standby mode.
operation. At the same time, set the CKE1 bit to the value for the fixed output state in
software standby mode.
Clock Output Control
Figure 13.31 Timing for Fixing Clock Output Level
Specified pulse width
Specified pulse width
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