h8s-2649 Renesas Electronics Corporation., h8s-2649 Datasheet - Page 12

• Manufacturer Part Number: h8s-2649
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Section 7 Bus Controller (BSC) ........................................................................ 103
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
7.10 Bus Controller Operation in Reset ..................................................................................... 135
Section 8 Data Transfer Controller (DTC)........................................................ 137
8.1
8.2
Rev. 2.00 Dec. 05, 2005 Page xii of xxxviii
6.4.7
6.4.8
Features.............................................................................................................................. 103
Input/Output Pins............................................................................................................... 105
Register Descriptions......................................................................................................... 105
7.3.1
7.3.2
7.3.3
7.3.4
7.3.5
7.3.6
Bus Control........................................................................................................................ 112
7.4.1
7.4.2
7.4.3
Basic Bus Interface ............................................................................................................ 115
7.5.1
7.5.2
7.5.3
7.5.4
Burst ROM Interface ......................................................................................................... 127
7.6.1
7.6.2
7.6.3
Idle Cycle........................................................................................................................... 130
7.7.1
7.7.2
Write Data Buffer Function ............................................................................................... 133
Bus Arbitration .................................................................................................................. 134
7.9.1
7.9.2
Features.............................................................................................................................. 137
Register Descriptions......................................................................................................... 139
8.2.1
PC Break Set for Instruction Fetch at Address Following Bcc Instruction........... 101
PC Break Set for Instruction Fetch at Branch Destination Address
of Bcc Instruction ................................................................................................. 101
Bus Width Control Register (ABWCR) ............................................................... 106
Access State Control Register (ASTCR) .............................................................. 106
Wait Control Registers H and L (WCRH and WCRL)......................................... 107
Bus Control Register H (BCRH) .......................................................................... 109
Bus Control Register L (BCRL) ........................................................................... 110
Pin Function Control Register (PFCR) ................................................................. 111
Area Division........................................................................................................ 112
Bus Specifications ................................................................................................ 113
Memory Interfaces................................................................................................ 114
Data Size and Data Alignment.............................................................................. 115
Valid Strobes ........................................................................................................ 117
Basic Timing......................................................................................................... 118
Wait Control ......................................................................................................... 125
Basic Timing......................................................................................................... 127
Wait Control ......................................................................................................... 129
Write Access......................................................................................................... 129
Operation .............................................................................................................. 130
Pin States in Idle Cycle......................................................................................... 132
Operation .............................................................................................................. 134
Bus Transfer Timing............................................................................................. 134
DTC Mode Register A (MRA) ............................................................................. 140