h8s-2649 Renesas Electronics Corporation., h8s-2649 Datasheet - Page 380

• Manufacturer Part Number: h8s-2649
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Section 12 Watchdog Timer (WDT)
Note:
Rev. 2.00 Dec. 05, 2005 Page 342 of 724
REJ09B0200-0200
Bit
2
1
0
*
Bit Name
CKS2
CKS1
CKS0
Only 0 can be written, for flag clearing.
Initial
Value
0
0
0
R/W
R/W
R/W
R/W
Description
Clock Select 2 to 0
Selects the clock source to be input to TCNT. The
overflow cycle is the period from which TCNT starts
incrementing at H'00 and until it overflows.
When PSS = 0 (values in parentheses are for φ = 20
MHz):
000: φ/2 (cycle: 25.6 µs)
001: φ/64 (cycle: 819.2 ms)
010: φ/128 (cycle: 1.6 ms)
011: φ/512 (cycle: 6.6 ms)
100: φ/2048 (cycle: 26.2 ms)
101: φ/8192 (cycle: 104.9 ms)
110: φ/32768 (cycle: 419.4 ms)
111: φ/131072 (cycle: 1.68 s)
When PSS = 1 (values in parentheses are for φSUB =
32.768 kHz):
000: φSUB/2 (cycle: 15.6 ms)
001: φSUB/4 (cycle: 31.3 ms)
010: φSUB/8 (cycle: 62.5 ms)
011: φSUB/16 (cycle: 125 ms)
100: φSUB/32 (cycle: 250 ms)
101: φSUB/64 (cycle: 500 ms)
110: φSUB/128 (cycle: 1 s)
111: φSUB/256 (cycle: 2 s)