h8s-2649 Renesas Electronics Corporation., h8s-2649 Datasheet - Page 195

• Manufacturer Part Number: h8s-2649
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Table 8.5
[Legend]
N:
Table 8.6
Note:
The number of execution states is calculated from using the formula below. Note that Σ is the sum
of all transfers activated by one activation source (the number in which the CHNE bit is set to 1,
plus 1).
Number of execution states = I · (1 + S
For example, when the DTC vector address table is located in the on-chip ROM, normal mode is
set, and data is transferred from on-chip ROM to an internal I/O register, then the time required for
the DTC operation is 13 states. The time from activation to the end of the data write is 10 states.
Mode
Normal
Repeat
Block transfer
Object to be Accessed
Bus width
Access states
Execution
status
Block size (initial setting of CRAH and CRAL)
*
Not available in this LSI.
Vector read S
Register information
read/write S
Byte data read S
Word data read S
Byte data write S
Word data write S
Internal operation S
DTC Execution Status
Number of States Required for Each Execution Status
Vector Read
I
1
1
1
J
I
K
L
K
L
M
Register Information
Read/Write
J
6
6
6
On-
Chip
RAM
32
1

1
1
1
1
1
1
I
) + Σ (J · S
On-
Chip
ROM
16
1
1

1
1
1
1
J
+ K · S
2
On-Chip I/O
Registers
8


2
4
2
4
Data Read
K
1
1
N
K
+ L · S
Rev. 2.00 Dec. 05, 2005 Page 157 of 724
16
2


2
2
2
2
Section 8 Data Transfer Controller (DTC)
L
) + M · S
External Devices*
8
2
4

2
4
2
4
Data Write
L
1
1
N
M
3
6+2m 2

3+m
6+2m 2
3+m
6+2m 2
REJ09B0200-0200
16
2

2
2
3
Internal
Operations
M
3
3
3
3+m

3+m
3+m
3+m
3+m