h8s-2649 Renesas Electronics Corporation., h8s-2649 Datasheet - Page 363

• Manufacturer Part Number: h8s-2649
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

11.4
11.4.1
Figure 11.2 shows a block diagram of the PPG. PPG pulse output is enabled when the
corresponding bits in P1DDR and NDER are set to 1. An initial output value is determined by its
corresponding PODR initial setting. When the compare match event specified by PCR occurs, the
corresponding NDR bit contents are transferred to PODR to update the output values.
The sequential output of up to 8 bits of data is possible by writing new output data to NDR before
the next compare match.
Pulse output pin
Operation
Overview
Figure 11.2 PPG Output Operation
DDR
Normal output/inverted output
Q
NDER
Q
PODR
Section 11 Programmable Pulse Generator (PPG)
Output trigger signal
C
D
Rev. 2.00 Dec. 05, 2005 Page 325 of 724
Q
NDR
D
Internal data bus
REJ09B0200-0200