cx28380 Mindspeed Technologies, cx28380 Datasheet - Page 12

• Manufacturer Part Number: cx28380
• Description: Cn8380 Quad T1/e1 Line Interface
• Manufacturer: Mindspeed Technologies

Figure 1-3.
29380-DSH-001-B
Transmit Pulse Template
Zero Code Suppression
Transmitter Termination
Transmit Output Enable
Transmit Negative Rail
1544 kHz All 1s Clock
2048 kHz All 1s Clock
CX28380 Logic Diagram (Hardware Mode)
Transmit Positive Rail
Hardware/Host Mode
Jitter Attenuator Path
Jitter Attenuator Size
Remote Loopback
Raw Mode Select
Test Mode Select
Reference Clock
Hardware Reset
Unipolar/Bipolar
Local Loopback
Transmit Clock
Transmit All 1s
Clock Polarity
Receive Ring
Test Reset In
Test Clock In
Test Data In
Receive Tip
CLAD Input
Preliminary Information / Mindspeed Proprietary and Confidential
VDD
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Mindspeed Technologies
HM
RESET
JDIR
JSEL(2:0)
UNIPOLAR
HTERM
PTS(2:0)
CLK_POL
RAWMD[1:4]
LLOOP[1:4]
RLOOP[1:4]
ZCS
RTIP[1:4]
RRING[1:4]
TCLK[1:4]
TPOSI[1:4]
TNEGI[1:4]
TACKI
EACKI
XOE[1:4]
TAIS[1:4]
CLADI
REFCKI
TCK
TMS
TDI
TRST
PIO = Programmable I/O
Hardware Mode
Adapter (CLAD)
I = Input, O = Output
Boundary Scan
Transmitter
Clock Rate
Hardware
Interface
Receiver
(RCVR)
(XMTR)
Control
(JTAG)
JATERR[1:4]
RNEGO[1:4]
RPOSO[1:4]
XRING[1:4]
RCKO[1:4]
RLOS[1:4]
XTIP[1:4]
CLK1544
CLK2048
CLADO
CLK32
®
TDO
IRQ
O
O
O
O
O
O
O
O
O
O
O
O
O
Transmit DPM
Jitter Attenuator Error Status
Receive Loss of Signal Status
Receive Clock
Receive Positive Rail
Receive Negative Rail
Transmit Tip
Transmit Ring
32.768 MHz Clock Out
T1 Line Rate Clock Out
E1 Line Rate Clock Out
8 KHz Clock Out
Test Data Out
Pin Descriptions
4