tmpr4937 TOSHIBA Semiconductor CORPORATION, tmpr4937 Datasheet - Page 359

• Manufacturer Part Number: tmpr4937
• Description: 64-bit Tx System Risc
• Manufacturer: TOSHIBA Semiconductor CORPORATION

15:11
Bit
8:6
2:0
10
15
9
5
4
3
10.5.3
Mnemonic
PMESPT
PMECLK
PMVER
D2SPT
D1SPT
DSI
PMESPT
0x19
Power Management Capability Register (PMC)
R
PME Output
Support
D2 Support
D1 Support
Reserved
DSI
Reserved
PME Clock
Power
Management I/F
Version
Field Name
11
D2SPT D1SPT
10
R
0
PME_ Support (Fixed Value: 0x09)
Indicates that the PME* signal can be output from the state where the bit is
set to “1”.
Bit 15: Can output the PME* signal from the D3cold state.
Bit 14: Can output the PME* signal from the D3hot state.
Bit 13: Can output the PME* signal from the D2 state.
Bit 12: Can output the PME* signal from the D1 state.
Bit 11: Can output the PME* signal from the D0 state.
Note:
PME* signal from the D0 and the D3hot states.
D2_Support (Fixed Value: 0)
0: Indicates that the D2 state is not supported.
D1_Support (Fixed Value: 0)
0: Indicates that the D1 state is not supported.
DSI (Fixed Value: 0)
0: Indicates that Device Specific Initialization is not required.
PME Clock (Fixed Value: 0)
0: Indicates that the PCI Clock is not required to assert the PME* signal.
Version (Fixed Value: 0x2)
2: Indicates compliance with "PCI Power Management Interface
Specification" Version 1.1.
Figure 10.5.3 PMC Register
R
9
0
With the TX4937 PCI Controller, it is possible to output the
8
Reserved
10-101
6
Description
DSI
R
5
0
Chapter 10 PCI Controller
0xDE
Reserved PMECLK
4
R
3
0
2
PMVER
0x2
R
Read/Write
R
R
R
R
R
R
0
⎯
⎯
: Type
: Initial value