zic2410 California Eastern Laboratories, zic2410 Datasheet - Page 86

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zic2410

Manufacturer Part Number
zic2410
Description
Single-chip Solution, Compliant With Zigbee
Manufacturer
California Eastern Laboratories
Datasheet
TRSWC0 (TX/RX SWITCH CONTROL0 REGISTER, 0x220D) R/W.
This register is used to set two GPIO pins (P1.6, P1.7) as TX/RX switching control pins.
P1.6 and P1.7 can be used to control TX/RX switching when the TRSWC0 register is set to
‘0x50’. When TRSWC0 is set to ‘0x00’, the two pins are used as GPIO pins. TRSWC1 register
should be set the same as TRSWC0 to avoid collision.
TRSWC1 (TX/RX SWITCH CONTROL1 REGISTER, 0x2279) R/W.
This register is used to output TRSW and TRSWB signal at P1.6 and P1.7. TRSW signal
remains as a logic ‘1’ during packet transmission and as a logic ‘0’ during packet reception.
TRSWB, the complementary signal of TRSW, remains as a logic ‘0’ during packet transmission
and as a logic ‘1’ during packet reception. TRSWC1 register should be set to ‘0x00’ to output
TRSW and TRSWB signal.
3:0
Bit
Rev A
INTSTS
Name
Multiple Interrupt Status. Shows the interrupt status when multiple
interrupts occur concurrently. Each bit in INTSTS field represents the
status of a specific interrupt. A Table of Bit vs. Interrupt is shown below..
When an interrupt is triggered, the INTSTS field corresponding to each
interrupt is set to ‘0’. To clear the executed interrupt, the bit for each of
the executed interrupts should be reset to ‘1’ by software.
INTSTS[0] : MDREADY_INT interrupt
INTSTS[1] : TXEND_INT interrupt
INTSTS[2] : RXSTART_INT interrupt
INTSTS[3] : RXEND_INT interrupt
Document No. 0005-05-07-00-000
ZIC2410 Datasheet
Descriptions
Page 86 of 119
R/W
R/W
Reset
Value
1111

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