zic2410 California Eastern Laboratories, zic2410 Datasheet - Page 40
zic2410
Manufacturer Part Number
zic2410
Description
Single-chip Solution, Compliant With Zigbee
Manufacturer
California Eastern Laboratories
Datasheet
1.ZIC2410.pdf
(119 pages)
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There are four methods of data transfer based on the settings of CPOL and CPHA. Polarity of
SPI serial clock (SCK) is determined by CPOL value and it determines whether SCK activates
high or low.
If CPOL value is ‘0’, SCK pin retains ‘0’ during no data transmission. If CPOL value is ‘1’, SCK
pin retains ‘1’ during no data transmission. CPHA field determines the format of data to be
transmitted.
Table 24 describes the clock polarity and the data transition timing.
Figure 18, Figure 19, Figure 20, and Figure 21 describe this block when slave mode is selected.
When the values of CPOL and CPHA are the same, (a) and (d) below, output data is changed
at the falling edge of SCK. Input data is captured at the rising edge of SCK. When the CPOL
and CPHA values are different, (b) and (c) below, output data is changed at the rising edge of
received SCK. Input data is captured at the falling edge of SCK.
SPSR (SPI STATUS REGISTER, 0x2541)
Bit
7
Rev A
CPOL
Name
SPIF
0
0
1
1
SPI Interrupt Flag: When SPI interrupt occurs, this field is set to
‘1’. Set whenever data transmission is finished and it can be
cleared by software.
CPHA
Table 24 – Clock Polarity and Data Transition Timing
0
1
0
1
Figure 19 – (b) CPOL=0, CPHA=1
Figure 21 – (d) CPOL=1, CPHA=1
Figure 18 – (a) CPOL=0, CPHA=0
Figure 20 – (c) CPOL=1, CPHA=0
Document No. 0005-05-07-00-000
Table 25 – SPI Registers
ZIC2410 Datasheet
SCK when idle
Descriptions
High
High
Low
Low
Data Transition Timing
Falling Edge of SCK
Falling Edge of SCK
Rising Edge of SCK
Rising Edge of SCK
R/W
R/W
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